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Table of Contents

Table of Contents

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The Trenz Electronic TE0701 Carrier Board is a baseboard for 4 x 5 SoMs, which exposes the module's B2B connector pins to accessible connectors and provides a whole range of on-board components to test and evaluate TE 4 x 5 SoMs.

See page "4 x 5 cm carriers" to get information about the SoMs supported by the TE0701 carrier board.

Refer to http://trenz.org/te0701-info for the current online version of this manual and other available documentation.

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  1. HDMI connector (1.4 HEAC support), J4
  2. Micro-USB2 connector, J12

  3. Pmod connector, J5

  4. Pmod connector, J6
  5. User push-button ("RESTART" button by default), S2
  6. User push-button ("RESET" button by default), S1
  7. 8x red user LEDs, D1 ... D8
  8. Mini-USB2 connector, J7
  9. User 4-bit DIP switch, S3
  10. VITA 57.1 compliant LPC FMC connector, J10
  11. Barrel jack for 12V power supply, J13
  12. ARM JTAG connector (DS-5 D-Stream), J15, functionality depends on module
  13. User 4-bit DIP switch, S4
  14. Pmod connector, J1
  15. RJ45 Gigabit Ethernet connector, J14
  16. SD Card connector, J8
  17. Pmod connector, J2
  18. Jumper, J18
  19. Mini CameraLink connector, J3
  20. CR1220 Backup-Battery holder, B1
  21. Trenz Electronic 4 x 5 modules B2B connectors, JB1 ... JB3
  22. Jumper J16, J17, J21
  23. Jumper J9, J19, J20
  24. Analog Devices ADV7511 HDMI Transmitter, U1
  25. Lattice Semiconductor MachXO2 1200 HC System Controller CPLD, U14
  26. FTDI FT2232H USB2 to JTAG/UART Bridge, U3

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Control signal

Switch / Button / LED / PinSignal Schematic Names

Connected to

Functionality

Notes
SC CPLD JTAG EnableDIP switch S3-3JTAGENSC CPLD U14, pin 82

ON: SC CPLD FPGA JTAG enabled,
OFF: FPGA SC CPLD JTAG enabled,

-
BOOT MODESC CPLD U14, pin 27MODEB2B JB1, pin 31Boot Mode for attached module (Flash or SD)-
Module ResetSC CPLD U14, pin 13RESINB2B JB2, pin 17Module Reset-
Global Reset inputPush Button S2S2SC CPLD U14, pin 2Manual reset from user-
SD Card detectionSD Slot J8, pin 10SD_DETECTSC CPLD U14, pin 40Detection Signal for inserted SD CardBoot mode is set to SD Boot,
when SD Card is detected.
Board status indicatorsRed LEDs D1 ... D8ULED1 ... ULED8SC CPLD U14, pins
78, 77, 76, 16, 69, 68, 65, 64		indicating various board and
module status / configuration		Refer to the firmware documentation of the SC CPLD
U14 and to the subsection 'LEDs' in section 'On-board Peripherals'
for more details and current functionality.
Board 3.3V power indicatorGreen LED D223V3INB2B JB1, pin 14, 16

ON: 3.3V on-board voltage available

-
FMC_VADJ voltage selectionDIP switches S4-1, S4-2, S4-3VID0 ... VID2SC CPLD U14, pins 34, 35, 38sets adjustable voltage for FMC connector-
I²C control / FMC_VADJ voltage selectionDIP switches S3-2, S3-1CM0, CM1SC CPLD U14, pins 99, 1enabling / disabling I²C control of board functionalities,
sets FMC_VADJ voltage (only 3 steps),
available to user if FMC_VADJ set by DIP-switch S4		Refer to the firmware documentation of the SC CPLD
U14 and and to the subsection 'DIP switches' in section 'On-board
Peripherals' for current functionality and more details.


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Notes:

  • For carrier or stand-alone boards use subsection for every connector typ (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier us only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

FMC LPC Connector

I/O signals and interfaces connected to the FPGA SoCs I/O bank and FMC connector J10:

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FMC Connector J2 Pins and InterfacesI/O Signal CountLVDS-pairs countConnected toVCCIO voltageNotes
I/O3417B2B JB1 connectorFMC_VADJ / 3V3_FMCpins usable as single ended I/O's and LVDS pairs
3417B2B JB2 connectorFMC_VADJ / 3V3_FMC
I²C2-SC CPLD U14, pin 8, 10-FMC I²C Geographical Address pins GA0 and GA1 set to GND.
JTAG4-SC CPLD U14, pin 4, 7, 9, 123.3V-
Clock Input-2B2B JB1 connector-2x bidirectional reference clock inputs
Control Signals2-SC CPLD U14, pin 20, 28-

'PG_C2M',  'FMC_PRSNT'

Reference voltage (FMC_VREF)1-B2B JB1 connector, pin 85, 97
B2B JB2 connector, pin 37, 93		-FMC sets thresholds of attached module's reference voltage (VREF pins).


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Channel A of the FTDI chip is configured as JTAG interface (MPSSE) connected to the SC CPLD U14, the JTAG signals are forwarded to the JTAG interface of the attached module if DIP switch S3-3 is in OFFON-position.

Channel B can be used as UART interface routed to the SC CPLD U14 and is available for other user-specific purposes.

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There are two baseboard supply voltages VIOTA and VIOTB connected to the 4 x 5 SoM's PL IO-bank. The supply-voltages have following pin assignments on B2B-connectors:

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Oct 2018
DateRevisionAuthorsDescription

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modified-date
modified-date
dateFormatyyyy-MM-dd

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infoTypeCurrent version
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  • orrectur JTAGEN description for CPLD/Modul access

2020-08-19

v.80

John Hartfiel

  • Corrected USB J9 description
  • Typos
  • update Button description
  • Note for J15

2019-01-11

v.73
John Hartfiel
  • correction temperature range

2018-10-22

v.72Ali Naseri
  • General TRM revision and updated to new style
2018-06-13


v.66

Ali Naseri
  • updated Power-on sequence diagram
2018-01-12

v.62

John Hartfiel
  • Dual PMOD note
2017-11-09v.60John Hartfiel
  • add B2B connector section
2017-08-15

v.59

John Hartfiel
  • Add VCCIO Jumper Pin location.
  • Updated VADJ description.
2017-08-14v.58John Hartfiel
  • Description correction.
2017-05-25v.56Jan Kumann
  • New physical dimensions drawing of the board.
2017-05-16

v.51

Jan Kumann
  • A few overall improvements and corrections, new  block diagram.
2017-04-11


Ali Naseri
  • added block diagram
2017-02-15

v.45

Ali Naseri
  • added warning concerning the use of FTDI tools
2017-02-15v.40Ali Naseri
  • added power-on sequence diagram
2017-01-19

v.35

Ali Naseri
  • correction of table 3 (switch-positions to adjust FMC_VADJ)
  • inserted hint to set and measure the PL IO-bank supply-voltages
2017-01-13

v.20

Ali Naseri
  • added section for baseboard supply voltage configuration
2016-11-29
v.10


Ali Naseri
  • TRM update due to new revision 06 of
  • the carrier board.
2016-11-28v.4

Ali Naseri

  • TRM adjustment to the newest
  • revision (05) of TE0701 Carrier Board.
2014-02-18
0.2
Sven-Ole Voigt
  • TE0701-03 (REV3) updated
2014-01-05

0.1

Sven-Ole Voigt
  • Initial release


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