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Note:
Use 'Key Features' description in shoping page, for example: https://shop.trenz-electronic.de/de/TE0728-04-1Q-SoC-MicromodulModul-mit-XilinxAMD-Automotive-Zynq-7020-512-MByte-DDR3L-6-x-6-cm

  • 3 x Samtec LSHM Series Board to Board Connectors
  • VG96 connector (mounting holes and solder pads, J6) and 50-pin IDC male connector socket (J5) for access to PL I/O-bank pins
  • USB2.0 type A connector, or optionally Micro USB 2.0 connector
  • 1 x RJ45 GbE MagJack (J3), connected via MDI to B2B connector JB1
  • 1 x Marvell Alaska 88E1512 GbE PHY, providing Ethernet interface in conjunction with RJ45 GbE MagJack (J2)
  • 4 A High-Efficiency Power SoC DC-DC Step-Down Converter (Enpirion EN6347) for 3.3V power supply
  • XMOD JTAG- / UART-header JX1
  • Micro SD card socket
  • SDIO port expander with voltage-level translation and jumper (J13) for selection of SDIO voltage on SoM side
  • DIP-switches S1 to set SoM's control signals
  • 1 x user-push button (S2), by default configured as system reset button
  • 3 x VCCIO selection jumper J10, J11 and J12 to set SoM's PL I/O-bank voltages
  • 5V power supply barrel jack

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  • VCCIO voltage selection jumpers are all set to 1.8 V.
  • S2 switch configured as reset button.One VG96 connector (not soldered to the board, but included in the package as separate component)

Different delivery configurations are available upon request.

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Scroll Title
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titleXMOD adapter board DIP-switch positions for voltage configuration

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XMOD DIP-switchesPosition
Switch 1ON
Switch 2OFF
Switch 3OFF
Switch 4ON



Note

Use Xilinx AMD compatible TE0790 adapter board (designation TE-0790-xx with out 'L') to program the Xilinx AMD Zynq devices.

The TE0790 adapter board's CPLD have to be configured with the Standard variant of the firmware. Refer to the TE0790 Resources Site for further information and firmware download.

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titleRJ45 connectors

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PHY U6 pinsB2B-pinNotes
ETH-MDC/ETH-MDIOJB3-49, JB3-51-
PHY_LED0-Connected to GbE MagJack J2 LED0 (green). Also connected to J5-24 (PHY_LED0_CON).
PHY_LED1-Connected to GbE MagJack J2 LED1 (green). Also connected to J5-23 (PHY_LED1_CON).
PHY_INTJB3-33-
CONFIGJB3-60-
CLK125JB3-32PHY Clock (125 MHz) output.
ETH-RSTJB3-53-
RGMIIJB3-31
JB3-37 - JB-44
JB3-47
JB3-57 - JB-59

Reduced Gigabit Media Independent Interface. 12 pins.

Note

ETH-RXCK is connected via 0Ohm to JB3-31 (R18)and JB3-58 (R19). Usage depends on Module and Xilinx AMD IP restrictions
In case of performance  problems remove 0Ohm resistor from the unused Pin.


SGMII-

Serial Gigabit Media Independent Interface.

Not connected.

MDI-

Media Dependent Interface.

Connected to Gigabit Ethernet MagJack J2.


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The TE0706 Carrier Board is equipped with a Texas Instruments TXS02612 SDIO SDIO Port Expander, which is needed for voltage translation due to different voltage levels of the Micro SD Card and the PS MIO-bank of the Zynq device of the mounted SoM. The Micro SD Card has 3.3V signal voltage level, but the PS MIO-bank on the Xilinx AMD Zynq module has VCCIO of 1.8V or 3.3V depending on the attached module. This has to be selected by J13.

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The maximum power consumption of the Carrier Board depends mainly on the mounted SoM's FPGA design running on the Zynq device.

Xilinx AMD provide a power estimator excel sheets to calculate power consumption. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.

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titleDocument change history.

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updatePhysical

Date

Revision

Contributors

Description

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dateFormatyyyy-MM-dd

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  • Changed Xilinx to AMD.
  • Updated to PCN-20231106.

2021-02-19

v.76

John Hartfiel

  • Note to PHY connection
2010-07-16v.74John Hartfiel
  • update Physical
  • Dimensions
2019-05-27v.73Martin Rohrmüller
  • Updated to REV03
  • Updated to TRM v28
2018-06-03v.66John Hartfiel
  • Add note to DIP settings
2017-11-10

v.64

John Hartfiel
  • Replace B2B connector section
2017-11-09v.60Ali Naseri
  • TRM revision to new common style

2017-07-06

v.52
Ali Naseri, Jan Kumann
  • Hardware revision 02 specific changes.
2017-01-06v.1Ali Naseri
  • initial document to board revision 02
---all

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infoTypeModified users
typeFlat
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