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RGPIO_EXT External Interface
Communication channel between master and slave interface.
| Port Name | IO | Description |
|---|---|---|
| RGPIO_M_CLK | out | RGPIO Master Clock |
| RGPIO_M_RX | in | RGPIO Master RXD |
| RGPIO_M_TX | out | RGPIO Master TXD |
| Port Name | IO | Description |
|---|---|---|
| RGPIO_S_CLK | out | RGPIO Slave Clock |
| RGPIO_S_RX | in | RGPIO Slave RXD |
| RGPIO_S_TX | out | RGPIO Slave TXD |
RGPIO_M_USR Interface
Master user interface to communicate with slave device.
| Port Name | IO | Description |
|---|---|---|
| RGPIO_M_OUT | out | 23bit data output to slave device* |
| RGPIO_M_IN | in | 23bit data input from slave device* |
| RGPIO_M_RESERVED_OUT | out | 4bit reserved for future usage |
| RGPIO_M_RESERVED_IN | in | 4bit reserved for future usage |
| RGPIO_M_SLAVE_ACTIVATION_CODE | out | 4bit activation code from external slave for information only |
| RGPIO_M_ENABLE | in | Enable RGPIO communication. High active. |
| RGPIO_M_USRCLK | in | RGPIO transmission CLK for master and slave |
| RGPIO_M_RESET_N | in | RGPIO Reset. Low active. |
*currently limited to 23 bit to use IP with CPLD implementations of TE Boards. For general usage, this restriction will be removed on future IP update.
RGPIO_
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S_USR Interface
Slave user interface to communicate with master device.
| Port Name | IO | Description |
|---|---|---|
| RGPIO_S_OUT | out | 23bit data output to master device* |
| RGPIO_S_IN | in | 23bit data input from master device* |
| RGPIO_S_RESERVED_OUT | out | 4bit reserved for future usage |
| RGPIO_S_RESERVED_IN | in | 4bit reserved for future usage |
| RGPIO_S_MASTER_ACTIVATION_CODE | out | 4bit activation code from external master for information only |
| RGPIO_S_ENABLED | out | Interface status. |
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