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For general structure and of the reference design, see Project Delivery - Xilinx AMD devices
Design Sources
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Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.
See also:
- Xilinx AMD Development ToolsTools#XilinxSoftware-BasicUserGuides
- Vivado Projects - TE Reference Design
- Project Delivery.
The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.
TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality
- _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
- Press 0 and enter for minimum setup
- (optional Win OS) Generate Virtual Drive or use short directory for the reference design (for example x:\<design name>)
- Create Project
- Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
Note: Select correct one, see TE Board Part Files
- Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
- Create HDF and export to prebuilt folder
- Run on Vivado TCL: TE::hw_build_design -export_prebuilt
Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
- Run on Vivado TCL: TE::hw_build_design -export_prebuilt
- Generate Programming Files with HSI/SDK
- Run on Vivado TCL: TE::sw_run_hsi
Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv" - (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdk
Note: See SDK Projects
- Run on Vivado TCL: TE::sw_run_hsi
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Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and Debugging
QSPI
Optional for Boot.bin on QSPI Flash and image.ub on SD.
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IBERT MGT ( on Z045 / on Z030 ) | TE0745 Xil Symb | TE0745 Schem Name | TEB0745 SFP Designator |
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X0Y8 | MGT0_111 | MGT_RX4RX/TX4 | J20/21 |
X0Y9 | MGT1_111 | MGT_RX5RX/TX5 | J18/19 |
X0Y10 | MGT2_111 | MGT_RX6RX/TX6 | J15/17 |
X0Y11 | MGT3_111 | MGT_RX7RX/TX7 | J13/14 |
X0Y12 / X0Y0 | MGT0_112 | MGT_RX0RX/TX0 | J10/11 |
X0Y13 / X0Y1 | MGT1_112 | MGT_RX1RX/TX1 | J8/9 |
X0Y14 / X0Y2 | MGT2_112 | MGT_RX2RX/TX2 | J6/7 |
X0Y15 / X0Y3 | MGT3_112 | MGT_RX3RX/TX3 | J4/J5 |
System Design - Vivado
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