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FMC
InterfacesI/O Signal CountLVDS-pairs countConnected toVCCO bank VoltageNotes

J8

(FMC C)

I/O2010Bank 50 HDFMCBC_1V8-
68483424Bank 67 HPFMCBC_1V8-
I²C2-I²C-Switch U13-Muxed to MIO Bank 501 I²C Inteface
JTAG4-SC CPLD U27 Bank 23.3VSB-
MGT-8 (4 x RX/TX)Bank 230 GTH-4x MGT lanes
Clock Input-2Bank 50 HD-

2x Reference clock inputs to PL bank

-1Bank 230 GTH-1x Reference clock input to MGT bank
Control Signals3-SC CPLD U27 Bank 23.3VSB

'FMCC_PG_C2M', 'FMCC_PG_M2C', 'FMCC_PRSNT'

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infoTypeCurrent version
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infoTypeModified by
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  • correction of J8 Pin count description
2018-07-23v.182Ali Naseri
  • Initial document
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Table 66: Document change history

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