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Template Revision 2.12

  • Module: TRM Name always "TE Series Name" +TRM
    Example: "TE0728 TRM"
  • Carrier: TRM Name usually "TEB Series Name" +TRM
    Example: "TEB0728 TRM"


HTML
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Important General Note:

  • If some section is configurable and depends on Firmware, please refer to the addition page (for example CPLD). If not available, add note, that this part is configurable
  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template:

        Scroll Title
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        titleText


        Scroll Ignore

        Create DrawIO object here: Attention if you copy from other page, objects are only linked.


        Scroll Only

        image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed



      • Table template:

        • Layout macro can be use for landscape of large tables

      • Scroll Title
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        titleText

        Scroll Table Layout
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        ExampleComment
        12



    • The anchors of the Scroll Title should be named consistant across TRMs. A incomplete list of examples is given below

      • <type>_<main section>_<name>

        • type: Figure, Table
        • main section:
          • "OV" for Overview
          • "SIP" for Signal Interfaces and Pins,
          • "OBP" for On board Peripherals,
          • "PWR" for Power and Power-On Sequence,
          • "B2B" for Board to Board Connector,
          • "TS" for Technical Specification
          • "VCP" for Variants Currently in Production
          •  "RH" for Revision History
        • name: custom, some fix names, see below
      • Fix names:
        • "Figure_OV_BD" for Block Diagram

        • "Figure_OV_MC" for Main Components

        • "Table_OV_IDS" for Initial Delivery State

        • "Table_PWR_PC" for Power Consumption

        • "Figure_PWR_PD" for Power Distribution
        • "Figure_PWR_PS" for Power Sequence
        • "Figure_PWR_PM" for Power Monitoring
        • "Table_PWR_PR" for Power Rails
        • "Table_PWR_BV" for Bank Voltages
        • "Table_TS_AMR" for Absolute_Maximum_Ratings

        • "Table_TS_ROC" for Recommended_Operating_Conditions

        • "Figure_TS_PD" for Physical_Dimensions
        • "Table_VCP_SO" for TE_Shop_Overview
        • "Table_RH_HRH" for Hardware_Revision_History

        • "Figure_RH_HRN" for Hardware_Revision_Number
        • "Table_RH_DCH" for Document_Change_History
    • Use Anchor in the document: add link macro and add "#<anchorname>
    • Refer to Anchror from external : <page url>#<pagename without space characters>-<anchorname>



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-----------------------------------------------------------------------


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Note for Download Link of the Scroll ignore macro:


Scroll Ignore

Download PDF version of this document.


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Table of Contents

Table of Contents

Overview

The Trenz Electronic TEP0006 is an Ultra96 LS Expansion to Pmod adapter.

Refer to http://trenz.org/tep0006-info for the current online version of this manual and other available documentation.

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Notes :

Key Features

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Note:
 'description: Important components and connector or other Features of the module
→ please sort and indicate assembly options

Key Features'  must be split into 6 main groups:

  • FPGA/Module
    • Package:
    • Speed:
    • Temperature:
  • RAM/Storage
    • E.g. SDRAM, SPI
  • On Board
    • E.g. CPLD, PLL
  • Interface
    • E.g. ETH, USB, B2B, Display port
  • Power
    • E.g. Input supply voltage
  • Dimension
  • On Board:
    • 4x Voltage Level Translators
    • 2x Voltage Regulators
  • Interface:
    • 1x Ultra96 LS Expansion Header (40 Pins)
    • 3x Pmod Connectors
    • 3x Jumpers
  • Power:
    • 5V
    • VCC_PSAUX
  • Dimension: 
    • 85 mm x 17 mm

Block Diagram

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add drawIO object here.

Note

For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .



Scroll Title
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titleTEP0006 block diagram


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Main Components

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Notes :

  • Picture of the PCB (top and bottom side) with labels of important components
  • Add List below


Note

For more information regarding how to add board photoes, Please refer to "Diagram Drawing Guidline" .



Scroll Title
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titleTEP0006 Main Components


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  1. PMod 2x6 Host Socke (PMOD 2)  ,J2
  2. PMod 2x6 Host Socke (PMOD 2) ,J1
  3. Level Translator (HP_GPIO[0..7]) ,U1
  4. Level Translator (HP_GPIO[8..15]),U3
  5. Level Translator PMOD(SPI),U6
  6. Linear Voltage Regulator,U2
  7. Jumper,J6-J7
  8. PMod 2x6 Host Socke (SPI),J4
  9. GROVE,J5
  10. Level Translator (GROVE) ,U5
  11. Jumper (Voltage select ),J10
  12. Ultra96 LS Expansion Header (40 Pos),J3

Initial Delivery State

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Notes :

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty


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titleInitial delivery state of programmable devices on the module

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Storage device name

Content

Notes

---------


Configuration Signals

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  • Overview of Boot Mode, Reset, Enables.

Signals, Interfaces and Pins

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Notes :

  • For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

Low Speed Expansion Connector

The SMD Header J3 has 40 pin (20x2) and it is compatible with Ultra96 LS Expansion Connector. You can find General information about the LS Expansion connector in the following table.

Scroll Title
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titleUltra96 LS Expansion information

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SchematicConnected toNotes
HD_GPIO0...7Level Translator HP_GPIO[0...7], U1GPIO0...7

HD_GPIO8...15

Level Translator HP_GPIO[8...15], U3GPIO8...15

MIO36...37

Level Translator PMOD(SPI)PS_GPIO_0...1
MIO38, MIO41...43Level Translator PMOD(SPI)SPI
VCC_PSAUX

Level Translator, U1-U3-U5-U6

Voltage Regulator, U2

1.8 V

nPOK

5V

Voltage Regulator, U2

Jumper, J10

Vin

Pull up Voltage


Pmod Connectors

The TEP0006 is equipped with three Pmod connectors. Pmod Connectors are the expanded outputs from Ultra96 Board. 

Scroll Title
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titlePmod Connectors information

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Pin

Connected to

Notes

Pmod 1, J1Pmod 2, J2 Pmod SPI, J4
1PMOD_HD-GPIO0PMOD_HD-GPIO8SS
2PMOD_HD-GPIO1PMOD_HD-GPIO9MOSI
3PMOD_HD-GPIO2PMOD_HD-GPIO10MISO
4PMOD_HD-GPIO3PMOD_HD-GPIO11SCK
5GNDGNDGND
63.3 V3.3 V3.3 V
7PMOD_HD-GPIO4PMOD_HD-GPIO12INIT
8PMOD_HD-GPIO5PMOD_HD-GPIO13RESET
9PMOD_HD-GPIO6PMOD_HD-GPIO14Not Connected
10PMOD_HD-GPIO7PMOD_HD-GPIO15Not Connected
11GNDGNDGND
123.3 V3.3 V3.3 V


Jumpers

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titlePmod Connectors information

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DesignatorFunctionalityConnection BetweenNotes

J6

HD_GPIO_15

Level Translator U3 and U5

If you install the jumper HD_GPIO_15 will be driven through Level Translator (U5) and Grove (J5) otherwise it goes to Level Translator (U3).
J7HD_GPIO_11

Level Translator U3 and U5

If you put the jumper HD_GPIO_11 will be driven through Level Translator (U5) and Grove (J5) otherwise it goes to Level Translator (U3).
J10Voltage select

5 V, 3.3 V

Pull up Voltage



On-board Peripherals

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs


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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection


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titleOn board peripherals

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Chip/InterfaceDesignatorNotes
------


Power and Power-On Sequence

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In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit


Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


Power Supply

Power is supplied by Ultra96 Board through SMD Header J3.

Power Consumption

Scroll Title
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titlePower Consumption

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Power Input PinTypical Current
5VTBD
VCC_PSAUXTBD


* TBD - To Be Determined

Power Distribution Dependencies

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titlePower Distribution


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Power-On Sequence

There is no specific power on sequence, after power on the Ultra96 Board all electrical components on TEP0006 will be enabled.

Power Rails

Scroll Title
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titleModule power rails.

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Power Rail Name

LS Expansion Connector Pin

DirectionNotes
+5V37InputSupplied by Ultra96
VCC_PSAUX35InputSupplied by Ultra96


Technical Specifications

Absolute Maximum Ratings

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titlePS absolute maximum ratings

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SymbolsDescriptionMinMaxUnit
T_STGStorage Temperature-55150°C


Recommended Operating Conditions

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Scroll Title
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titleRecommended operating conditions.

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ParameterMinMaxUnitsReference Document
T_OPT-40+85°C


Physical Dimensions

  • Module size: 85 mm × 17 mm.  Please download the assembly diagram for exact numbers.

PCB thickness: 1.6 mm.

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In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM.

For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below:

https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF

Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .



Scroll Title
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titlePhysical Dimension


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scroll-htmltrue



Currently Offered Variants 

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Set correct link to the shop page overview table of the product on English and German.

Example for TE0728:

    ENG Page: https://shop.trenz-electronic.de/en/Products/Trenz-Electronic/TE07XX-Zynq-SoC/TE0728-Zynq-SoC/

    DEU Page: https://shop.trenz-electronic.de/de/Produkte/Trenz-Electronic/TE07XX-Zynq-SoC/TE0728-Zynq-SoC/

For Baseboards or modules, where no overview page is available (and revision number is coded in the direct link) use shop search link, e.g. TE0706:

    ENG Page: https://shop.trenz-electronic.de/en/search?sSearch=TEP0006

   DEU Page: https://shop.trenz-electronic.de/de/search?sSearch=TE0706


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titleTrenz Electronic Shop Overview

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Trenz shop TEP0006 overview page
English pageGerman page


Revision History

Hardware Revision History

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Set correct links to download  arrier, e.g. TE0706 REV02:

  TE0706-02  ->   https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0706/REV02/Documents

Note:

  • Date format:  YYYY-MM-DD


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titleHardware Revision History

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DateRevisionChangesDocumentation Link
2019-07-1901Initial ReleaseREV01


Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

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titleBoard hardware revision number.


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Document Change History

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  • Note this list must be only updated, if the document is online on public doc!
  • It's semi automatically, so do following
    • Add new row below first

    • Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template

    • Metadata is only used of compatibility of older exports


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titleDocument change history.

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DateRevisionContributorDescription|

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  • Initial release

--

all

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  • --


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Include Page
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