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Template Revision 2.8 - on construction

Design Name always "TE Series Name" + Design name, for example "TE0720 Test Board"


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Template Revision 1.0
Basic Notes
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Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/Trenz+Electronic+Documentation
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Table of contents

Table of Contents
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Overview

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General Design description
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Zynq PS Design with Linux for TE0701 with HDMI support.

Key Features

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Excerpt
  • PetaLinux
  • SD
  • ETH
  • USB
  • I2C
  • RTC
  • VIO PHY LED
  • HDMI
  • TE0701

Revision History

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  • initial release

Release Notes and Know Issues

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Requirements

Software

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Hardware

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Hardware Support
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Basic description of TE Board Part Files is available on TE Board Part Files.

Complete List is available on <design name>/board_files/*_board_files.csv

Design supports following modules:

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1GB

...

 

...

Design supports following carriers:

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Additional HW Requirements:

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Content

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For general structure and of the reference design, see Project Delivery - Xilinx devices

Design Sources

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tables have all same width (web max 1200px and pdf full page(640px), flexible width or fix width on menu for single column can be used as before) -->
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Important General Note:

  • Export PDF to download, if vivado revision is changed!

  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template (note: inner scroll ignore/only only with drawIO object):

        Scroll Title
        anchorFigure_xyz
        titleText


        Scroll Ignore

        Create DrawIO object here: Attention if you copy from other page, use


        Scroll Only

        image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed



      • Table template:

        • Layout macro can be use for landscape of large tables
        • Set column width manually(can be used for small tables to fit over whole page) or leave empty (automatically)

      • Scroll Title
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        ExampleComment
        12



  • ...


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Table of contents

Table of Contents
outlinetrue

Overview

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Notes :

Zynq PS Design with Linux for TE0701 with HDMI support.

Refer to http://trenz.org/te0720-info for the current online version of this manual and other available documentation.

Key Features

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Notes :

  • Add basic key futures, which can be tested with the design


Excerpt
  • Vitis/Vivado 2019.2
  • PetaLinux/Ubuntu/Debian
  • SD
  • ETH (use EEPROM MAC)
  • USB
  • I2C
  • RTC
  • VIO PHY LED
  • HDMI
  • FSBL for EEPROM MAC and CPLD access and  HDMI DMA
  • Special FSBL for QSPI Programming
  • TE0701 (only supported)

Revision History

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Notes :

  • add every update file on the download
  • add design changes on description


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DateVivadoProject BuiltAuthorsDescription
2020-02-272019.2

TE0720-HDMI701_noprebuilt-vivado_2019.2-build_7_20200227113153.zip
TE0720-HDMI701-vivado_2019.2-build_7_20200227113133.zip

Mohsen Chamanbaz
  • update vivado 2019.2
  • Ubuntu/Debian as root file system
2017-12-042017.2te0720-HDMI701_noprebuilt-vivado_2017.2-build_05_20171204082246.zip
te0720-HDMI701-vivado_2017.2-build_05_20171204081435.zip
Oleksandr Kiyenko
  • initial release



Release Notes and Know Issues

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Notes :
  • add known Design issues and general notes for the current revision
  • do not delete known issue, add fixed version time stamp if  issue fixed


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titleKnown Issues

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IssuesDescriptionWorkaroundTo be fixed version
No known issues--------


Requirements

Software

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Notes :

  • list of software which was used to generate the design


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titleSoftware

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SoftwareVersionNote
Vitis2019.2needed, Vivado is included into Vitis installation
PetaLinux2019.2needed


Hardware

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Notes :

  • list of software which was used to generate the design

Basic description of TE Board Part Files is available on TE Board Part Files.

Complete List is available on <design name>/board_files/*_board_files.csv

Design supports following modules:

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titleHardware Modules

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Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashEMMCOthersNotes
TE0720-03-2IF2if_1gbREV03|REV021GB32MB4GBNANA
TE0720-03-2IFC32if_1gbREV03|REV021GB32MB4GB2.5 mm connectorsNA
TE0720-03-2IFC82if_1gbREV03|REV021GB32MB32GBNANA
TE0720-03-1QF1qf_1gbREV03|REV021GB32MB4GBNANA
TE0720-03-1CF1cf_1gbREV03|REV021GB32MB4GBNANA
TE0720-03-1CFA1cf_1gbREV03|REV021GB32MB8GBNANA
TE0720-03-2EF2ef_1gbREV03|REV021GB32MB4GBNANA
TE0720-03-1CR 1cr_256mbREV03|REV02256MB32MBNANAnot supported on this demo (changes into FSBL and device tree template are need)
TE0720-03-L1IF l1if_512mbREV03|REV02512MB32MB4GBNALP DDR3, not supported on this demo (changes into FSBL and device tree template are need)
TE0720-03-14S-1C14s_1gbREV03|REV021GB32MB4GBNANA
TE0720-03-1QFA1qf_1gbREV03|REV021GB32MB4GBNAMicron Flash
TE0720-03-2IFA2if_1gbREV03|REV021GB32MB4GBNAMicron Flash
TE0720-03-1QFL1qf_1gbREV03|REV021GB32MB4GB2.5 mm connectorsNA



Design supports following carriers:

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titleHardware Carrier

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Carrier ModelNotes
TE0701


Additional HW Requirements:

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Additional HardwareNotes
Monitor with HDMITested with DELL U2412M
Micro USB to USB A AdapterAdapter for USB Hub
USB HUBTo connnect Mouse and Keyboard simultaneously
Keyboardneed for Ubuntu/Debian GUI
Mouseneed for Ubuntu/Debian GUI


Content

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Notes :

  • content of the zip file

For general structure and of the reference design, see Project Delivery - Xilinx devices

Design Sources

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titleDesign sources

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TypeLocationNotes
Vivado<design name>/block_design
<design name>/constraints
<design name>/ip_lib
Vivado Project will be generated by TE Scripts
Vitis<design name>/sw_libAdditional Software Template for Vitis and apps_list.csv with settings automatically for Vitis app generation
PetaLinux<design name>/os/petalinuxPetaLinux template with current configuration


Additional Sources

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titleAdditional design sources

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TypeLocationNotes
mkdebian_stretch.sh<design name>/os/petalinuxcreate Debian image
mkubuntu_BionicBeaver.sh<design name>/os/petalinuxcreate Ubuntu image



Prebuilt

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  • prebuilt files
  • Template Table:

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      File

      File-Extension

      Description

      BIF-File*.bifFile with description to generate Bin-File
      BIN-File*.binFlash Configuration File with Boot-Image (Zynq-FPGAs)
      BIT-File*.bitFPGA (PL Part) Configuration File
      DebugProbes-File*.ltxDefinition File for Vivado/Vivado Labtools Debugging Interface

      Debian SD-Image

      *.img

      Debian Image for SD-Card

      Diverse Reports---Report files in different formats
      Hardware-Platform-Specification-Files*.xsaExported Vivado Hardware Specification for Vitis and PetaLinux
      LabTools Project-File*.lprVivado Labtools Project File

      MCS-File

      *.mcs

      Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

      MMI-File

      *.mmi

      File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)

      OS-Image*.ubImage with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk)
      Software-Application-File*.elfSoftware Application for Zynq or MicroBlaze Processor Systems

      SREC-File

      *.srec

      Converted Software Application for MicroBlaze Processor Systems




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titlePrebuilt files (only on ZIP with prebult content)

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File

File-Extension

Description

BIF-File*.bifFile with description to generate Bin-File
BIN-File*.binFlash Configuration File with Boot-Image (Zynq-FPGAs)
BIT-File*.bitFPGA (PL Part) Configuration File
DebugProbes-File*.ltxDefinition File for Vivado/Vivado Labtools Debugging Interface

Debian/Ubuntu SD-Image

*.img

Ubuntu/Debian Image for SD-Card  (separate available on the download area)

Diverse Reports---Report files in different formats
Hardware-Platform-Specification-Files*.xsaExported Vivado Hardware Specification for Vitis and PetaLinux
LabTools Project-File*.lprVivado Labtools Project File
OS-Image*.ubImage with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk)
Software-Application-File*.elfSoftware Application for Zynq or MicroBlaze Processor Systems



Download

Reference Design is only usable with the specified Vivado/SDK/PetaLinux/SDx version. Do never use different Versions of Xilinx Software for the same Project.

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Reference Design is available on:

Design Flow

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Notes :
  • Basic Design Steps

  • Add/ Remove project specific description


Note

Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first lunch.

Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

See also:

The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI.  For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality


  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
    Image Added
  2. Press 0 and enter for minimum setup
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project
    1. Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
  5. Create XSA and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Create Linux (uboot.elf and image.ub) with exported XSA
    1. XSA is exported to "prebuilt\hardware\<short name>"
      Note: HW Export from Vivado GUI create another path as default workspace.
    2. Create Linux images on VM, see PetaLinux KICKstart
      1. Use TE Template from /os/petalinux
    3. Build the Debian image/Ubuntu image file with executing the "mkdebian_stretch.sh"/"mkubuntu_BionicBeaver.sh" file in Linux Terminal
  7. Add Linux files (uboot.elf and image.ub) to prebuilt folder
    1. "prebuilt\os\petalinux\<ddr size>" or "prebuilt\os\petalinux\<short name>"
  8. Generate Programming Files with Vitis
    1. Run on Vivado TCL: TE::sw_run_vitis -all
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
    2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_vitis
      Note:  TCL scripts generate also platform project, this must be done manuelly in case GUI is used. See Vitis

Launch

Programming

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Note:

  • Programming and Startup procedure

Additional Sources

...

Prebuilt

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<tr> <th>File                                 </th> <th>File-Extension</th>  <th>Description                                                                              </th> </tr>
<tr> <td>BIF-File                             </td> <td>*.bif         </td>  <td>File with description to generate Bin-File                                               </td> </tr>
<tr> <td>BIN-File                             </td> <td>*.bin         </td>  <td>Flash Configuration File with Boot-Image (Zynq-FPGAs)                                    </td> </tr>
<tr> <td>BIT-File                             </td> <td>*.bit         </td>  <td>FPGA Configuration File                                                                  </td> </tr>
<tr> <td>DebugProbes-File                     </td> <td>*.ltx         </td>  <td>Definition File for Vivado/Vivado Labtools Debugging Interface                           </td> </tr>
<tr> <td>Debian SD-Image                      </td> <td>*.img         </td>  <td>Debian Image for SD-Card                                                                </td> </tr>
<tr> <td>Diverse Reports                      </td> <td>  ---         </td>  <td>Report files in different formats                                                        </td> </tr>
<tr> <td>Hardware-Platform-Specification-Files</td> <td>*.hdf         </td>  <td>Exported Vivado Hardware Specification for SDK/HSI                                       </td> </tr>
<tr> <td>LabTools Project-File                </td> <td>*.lpr         </td>  <td>Vivado Labtools Project File                                                             </td> </tr>
<tr> <td>MCS-File                             </td> <td>*.mcs         </td>  <td>Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)                  </td> </tr>
<tr> <td>MMI-File                             </td> <td>*.mmi         </td>  <td>File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) </td> </tr>
<tr> <td>OS-Image                             </td> <td>*.ub          </td>  <td>Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk)             </td> </tr>
<tr> <td>Software-Application-File            </td> <td>*.elf         </td>  <td>Software Application for Zynq or MicroBlaze Processor Systems                            </td> </tr>
<tr> <td>SREC-File                            </td> <td>*.srec        </td>  <td>Converted Software Application for MicroBlaze Processor Systems                          </td> </tr>    
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File

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File-Extension

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Description

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Download

Reference Design is only usable with the specified Vivado/SDK/PetaLinux/SDx version. Do never use different Versions of Xilinx Software for the same Project.

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Reference Design is available on:

Design Flow

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Basic Design Steps
Add/ Remove project specific 
  -->
Note

Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first lunch.

Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

See also:

The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI.  For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality

 

  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
    Image Removed
  2. Press 0 and enter for minimum setup
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project
    1. Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
  5. Create HDF and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Create Linux (uboot.elf and image.ub) with exported HDF
    1. HDF is exported to "prebuilt\hardware\<short name>"
      Note: HW Export from Vivado GUI create another path as default workspace.
    2. Create Linux images on VM, see PetaLinux KICKstart
      1. Use TE Template from /os/petalinux
        Note: run init_config.sh before you start petalinux config. This will set correct temporary path variable.
  7. Add Linux files (uboot.elf and image.ub) to prebuilt folder
    1. "prebuilt\os\petalinux\default" or "prebuilt\os\petalinux\<short name>"
      Notes: Scripts select "prebuilt\os\petalinux\<short name>", if exist, otherwise "prebuilt\os\petalinux\default"
  8. Generate Programming Files with HSI/SDK
    1. Run on Vivado TCL: TE::sw_run_hsi
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
    2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdk
      Note: See SDK Projects

Launch

Programming

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Note

Check Module and Carrier TRMs for proper HW configuration before you try any design.

Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and Debugging

QSPI

Not used on this Example.

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Example:
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(if not done) Select 
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and create Vivado project with "vivado_create_project_guimode.cmd" or 
open with "vivado_open_project_guimode.cmd", if generated.
Type on Vivado Console: TE::pr_program_flash_mcsfile -swapp u-boot
Note: Alternative use SDK or setup Flash on Vivado manually
Reboot (if not done automatically)

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SD

Get prebuilt boot binaries

  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell
  2. Press 0 and enter to start "Module Selection Guide"
    1. Select assembly version
    2. Validate selection
    3. Select Create and open delivery binary folder
      Note: Folder (<project folder>/_binaries_<Articel Name>) with subfolder (boot_linux)

QSPI

Not used on this Example.

SD

  1. Format the SD Card with SD Card Formatter or other tool
  2. Write the Debian image or Ubuntu image file on SD Card with Win32DiskImager
  3. Copy Petalinux  image.ub and Boot.bin on SD-Card.
    • use files from (<project foler>/_binaries_<Articel Name>)/boot_linux from generated binary folder,see: Get prebuilt boot binaries
    • or use
    Copy image.ub and Boot.bin on SD-Card.
    • For correct prebuilt file location, see <design_name>/prebuilt/readme_file_location.txt
  4. Set Boot Mode to SD-Boot.
    • Depends on Carrier, see carrier TRM.
  5. Insert SD-Card in SD-Slot.

...

  1. Prepare HW like described on section Programming 46040563
  2. Connect UART USB (most cases same as JTAG)
  3. Select SD Card as Boot Mode
    Note: See TRM of the Carrier, which is used.
  4. Connect HDMI to Monitor
  5. On TE0701 Default  Firmware Boot Mode is selected via SD card (insered SD Card for SD Boot Mode)
  6. Connect HDMI to Monitor
  7. Connect USB Adapter with Hub and Mouse+Keyboard
  8. Power On PCB
    Note: 1. Zynq Boot ROM loads FSBL from SD into OCM, 2. FSBL loads U-boot from SD into DDR, 3. U-boot load Linux from SD into DDR

...

  1. Open Serial Console (e.g. putty)
    1. Speed: 115200
    2. COM Port: Win OS, see device manager, Linux OS see  dmesg |grep tty  (UART is *USB1)
  2. Linux Console:
    Note: Wait until Linux boot finished For Linux Login use:
    1. User Name: root
    2. Password: root
  3. You can use Linux shell now.
    1. I2C 0 Bus type: i2cdetect -y -r 0
    2. I2C 1 Bus type: i2cdetect -y -r 1
    3. RTC check: dmesg | grep rtc
    4. ETH0 works with udhcpc
    5. USB: insert USB device

HDMI Monitor

Second Linux shell is displayed on HDMI monitor.

Vivado HW Manager 

  1. Open Vivado HW-Manager and add VIO signal to dashboard (*.ltx located on prebuilt folder).

  2. PHY LED:

    Image Removed

 

System Design - Vivado

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PS Interfaces

...

  1. Debian Desktop
    1. Debian Desktop will be started automatically
    2. Use connected mouse + keyboard for interaction with GUI
    3. Web Browser Dillo open console and type dillo or use browser
    4. open console and start video or audio with "mplayer <video or audio file>"
  2. Ubuntu Desktop
    1. Ubuntu Desktop will be started automatically
    2. Use connected mouse + keyboard for interaction with GUI
    3. Web Browser Mozilla firefox can be used.
    4. Audio or Vider file can also be performed directly in GUI.

HDMI Monitor

Second Linux GUI is displayed on HDMI monitor.

Vivado HW Manager 

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Note:

  • Add picture of HW Manager

  • add notes for the signal either groups or topics, for example:

    Control:

    • add controllable IOs with short notes..

    Monitoring:

    • add short notes for signals which will be monitored only
    • SI5338 CLKs:
      • Set radix from VIO signals to unsigned integer. Note: Frequency Counter is inaccurate and displayed unit is Hz
      • expected CLK Frequ:...
  1. Open Vivado HW-Manager and add VIO signal to dashboard (*.ltx located on prebuilt folder).

  2. PHY LED:

    Image Added


System Design - Vivado

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Note:

  • Description of Block Design, Constrains... BD Pictures from Export...

Block Design

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PS Interfaces

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Note:

  • optional for Zynq / ZynqMP only

  • add basic PS configuration


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TypeNote
DDR---
QSPIMIO
ETH0MIO
USB0MIO
SD0MIO
SD1MIO
UART0MIO
UART1MIO
I2C0EMIO TE0701
I2C1EMIO TE0720
GPIOMIO
TTC0..1EMIO
WDTEMIO


Constrains

Basic module constrains

Code Block
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title_i_bitgen_common.xdc
#
# Common BITGEN related settings for TE0720 SoM
#
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design


Code Block
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title_i_common.xdc
#
set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]

Design specific constrain

Code Block
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title_i_TE0720-SC.xdc
#
# Constraints for System controller support logic
#
set_property PACKAGE_PIN K16

Constrains

Basic module constrains

Code Block
languageruby
title_i_bitgen_common.xdc
#
# Common BITGEN related settings for TE0720 SoM
#
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design
Code Block
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title_i_common.xdc
#
set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]

Design specific constrain

Code Block
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title_i_TE0720-SC.xdc
#
# Constraints for System controller support logic
#
set_property PACKAGE_PIN K16 [get_ports PL_pin_K16]
set_property PACKAGE_PIN K19 [get_ports PL_pin_K19]
set_property PACKAGE_PIN K20 [get_ports PL_pin_K20]
set_property PACKAGE_PIN L16 [get_ports PL_pin_L16]
set_property PACKAGE_PIN M15 [get_ports PL_pin_M15]
set_property PACKAGE_PIN N15 [get_ports PL_pin_N15]
set_property PACKAGE_PIN N22 [get_ports PL_pin_N22]
set_property PACKAGE_PIN P16 [get_ports PL_pin_P16K16]
set_property PACKAGE_PIN P22K19 [get_ports PL_pin_P22K19]

#
# If Bank 34 is not 2.5V Powered need change the IOSTANDARD
#set_property PACKAGE_PIN K20 [get_ports PL_pin_K20]
set_property IOSTANDARDPACKAGE_PIN LVCMOS25L16 [get_ports PL_pin*_L16]


Code Block
languageruby
title_i_hdmi.xdc
#
# TE0701 I2C Bus
#
set_property PACKAGE_PIN M15 [get_ports PL_pin_M15]
set_property PACKAGE_PIN W20N15 [get_ports iicPL_0pin_scl_ioN15]
set_property PACKAGE_PIN W21N22 [get_ports iicPL_0pin_sda_ioN22]
set_property IOSTANDARDPACKAGE_PIN LVCMOS25P16 [get_ports iicPL_0pin_scl_ioP16]
set_property IOSTANDARDPACKAGE_PIN LVCMOS25P22 [get_ports iicPL_0pin_sda_ioP22]

#
# ADV7511 InterfaceIf Bank 34 is not 2.5V Powered need change the IOSTANDARD
#
set_property PACKAGE_PINIOSTANDARD N20LVCMOS25 [get_ports PL_pin*]



Code Block
languageruby
title_i_hdmi.xdc
#
# TE0701 I2C Bus
#hdmi_out_clk]
set_property PACKAGE_PIN N19W20 [get_ports hdmiIIC_0_outscl_deio]
set_property PACKAGE_PIN R19W21 [get_ports hdmiIIC_0_outsda_hsyncio]
set_property PACKAGE_PINIOSTANDARD T19LVCMOS25 [get_ports hdmiIIC_out0_scl_vsyncio]
set_property PACKAGE_PINIOSTANDARD T18LVCMOS25 [get_ports {hdmi_out_data[0]}]IIC_0_sda_io]

#
# ADV7511 Interface
#
set_property PACKAGE_PIN R18N20 [get_ports {hdmi_out_data[1clk]}]
set_property PACKAGE_PIN R21N19 [get_ports {hdmi_out_data[2]}de]
set_property PACKAGE_PIN R20R19 [get_ports {hdmi_out_data[3]}hsync]
set_property PACKAGE_PIN M22T19 [get_ports {hdmi_out_data[4]}vsync]
set_property PACKAGE_PIN K21T18 [get_ports {hdmi_out_data[50]}]
set_property PACKAGE_PIN M21R18 [get_ports {hdmi_out_data[61]}]
set_property PACKAGE_PIN J20R21 [get_ports {hdmi_out_data[72]}]
set_property PACKAGE_PIN T17R20 [get_ports {hdmi_out_data[83]}]
set_property PACKAGE_PIN J22M22 [get_ports {hdmi_out_data[94]}]
set_property PACKAGE_PIN T16K21 [get_ports {hdmi_out_data[105]}]
set_property PACKAGE_PIN J21M21 [get_ports {hdmi_out_data[116]}]
set_property IOSTANDARDPACKAGE_PIN LVCMOS25J20 [get_ports {hdmi_*_out_data[7]}]

set_property PACKAGE_PIN AB16T17 [get_ports {cechdmi_out_clkdata[08]}]
set_property PACKAGE_PIN AB17J22 [get_ports {cthdmi_out_hpddata[09]}]
set_property PACKAGE_PIN AA16T16 [get_ports {lshdmi_out_oedata[010]}]
set_property IOSTANDARDPACKAGE_PIN LVCMOS25J21 [get_ports {cechdmi_out_clkdata[011]}]
set_property IOSTANDARD LVCMOS25 [get_ports {ct_hpd[0]}]hdmi_*]

set_property IOSTANDARDPACKAGE_PIN LVCMOS25AB16 [get_ports {lscec_oeclk[0]}]


Software Design - SDK/HSI

HTML
<!--
optional chapter
separate sections for different apps
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set_property PACKAGE_PIN AB17 [get_ports {ct_hpd[0]}]
set_property PACKAGE_PIN AA16 [get_ports {ls_oe[0]}]
set_property IOSTANDARD LVCMOS25 [get_ports {cec_clk[0]}]
set_property IOSTANDARD LVCMOS25 [get_ports {ct_hpd[0]}]
set_property IOSTANDARD LVCMOS25 [get_ports {ls_oe[0]}]


Software Design - Vitis

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Note:
  • optional chapter separate

  • sections for different apps

For SDK project creation, follow instructions from:SDK Projects

Vitis

Application

Page properties
hidden

FSBL

TE modified 2017.2 FSBL

Functions:

  • Read EEPROM MAC Address and make Address accessible by UBOOT (need defines on uboot  platform-top.h)
  • Read CPLD Firmware and SoC Type
  • Configure Marvell PHY
  • Configure ADV7511
  • Configure Video Timing Controller core
  • Configure VDMA core and enable transfers

Changes:

  • Add adv7511.c, adv7511.h, vdma.c, vdma.h, te_fsbl_config.h, te_fsbl_hooks.h te_fsbl_hooks.c, and includ into fsbl_hooks.c
    • te_fsbl_hooks.c defines must be changed for Assembly variant with smaller DDR size.

U-Boot

U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.

Software Design -  PetaLinux

HTML
<!--
optional chapter
Add "No changes." or "Activate: and add List"
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For PetaLinux installation and  project creation, follow instructions from:

Config

  • Subsystem Auto Hardware Settings:Serial Settings: ps7_uart_0

U-Boot

Code Block
languagejs

#include <configs/platform-auto.h>


#define UBOOT_ENV_MAGIC 0xCAFEBABE
#define UBOOT_ENV_MAGIC_ADDR 0xFFFFFC00
#define UBOOT_ENV_ADDR 0xFFFFFC04


Device Tree

Device Tree HDMI entries must be changed for Assembly variant with smaller DDR size.

true
idComments

----------------------------------------------------------

FPGA Example

scu

MCS Firmware to configure SI5338 and Reset System.

srec_spi_bootloader

TE modified 2019.2 SREC

Bootloader to load app or second bootloader from flash into DDR

Descriptions:

  • Modified Files: blconfig.h, bootloader.c
  • Changes:
    • Add some console outputs and changed bootloader read address.
    • Add bugfix for 2018.2 qspi flash

xilisf_v5_11

TE modified 2019.2 xilisf_v5_11

  • Changed default Flash type to 5.

----------------------------------------------------------

Zynq Example:

zynq_fsbl

TE modified 2019.2 FSBL

General:

  • Modified Files:main.c, fsbl_hooks.h/.c (search for 'TE Mod' on source code)
  • Add Files: te_fsbl_hooks.h/.c(for hooks and board)\n\

  • General Changes: 
    • Display FSBL Banner and Device ID

Module Specific:

  • Add Files: all TE Files start with te_*
    • READ MAC from EEPROM and make Address accessible by UBOOT (need copy defines on uboot  platform-top.h)
    • CPLD access
    • Read CPLD Firmware and SoC Type
    • Configure Marvell PHY

zynq_fsbl_flash

TE modified 2019.2 FSBL

General:

  • Modified Files: main.c
  • General Changes:
    •  Display FSBL Banner
    • Set FSBL Boot Mode to JTAG
    • Disable Memory initialisation

ZynqMP Example:

----------------------------------------------------------

zynqmp_fsbl

TE modified 2019.2 FSBL

General:

  • Modified Files: xfsbl_main.c, xfsbl_hooks.h/.c, xfsbl_board.h/.c(search for 'TE Mod' on source code)
  • Add Files:  te_xfsbl_hooks.h/.c (for hooks and board)\n\
  • General Changes: 
    • Display FSBL Banner and Device Name

Module Specific:

  • Add Files: all TE Files start with te_*
    • Si5338 Configuration
    • ETH+OTG Reset over MIO

zynqmp_fsbl_flash

TE modified 2019.2 FSBL

General:

  • Modified Files: xfsbl_initialisation.c, xfsbl_hw.h, xfsbl_handoff.c, xfsbl_main.c
  • General Changes:
    •  Display FSBL Banner
    • Set FSBL Boot Mode to JTAG
    • Disable Memory initialisation


zynqmp_pmufw

Xilinx default PMU firmware.

----------------------------------------------------------

General Example:

hello_te0820

Hello TE0820 is a Xilinx Hello World example as endless loop instead of one console output.

u-boot

U-Boot.elf is generated with PetaLinux. Vitis  is used to generate Boot.bin.

zynq_fsbl

TE modified 2019.2 FSBL

General:

  • Modified Files:main.c, fsbl_hooks.h/.c (search for 'TE Mod' on source code)
  • Add Files: te_fsbl_hooks.h/.c(for hooks and board)\n\

  • General Changes: 
    • Display FSBL Banner and Device ID

Module Specific:

  • Add Files: all TE Files start with te_*
    • READ MAC from EEPROM and make Address accessible by UBOOT (need copy defines on uboot  platform-top.h)
    • CPLD access
    • Read CPLD Firmware and SoC Type
    • Configure Marvell PHY
    • USB PHY Reset
    • Configure LED usage






TE modified 2019.2 FSBL

General:

  • Modified Files:main.c, fsbl_hooks.h/.c (search for 'TE Mod' on source code)
  • Add Files: te_fsbl_hooks.h/.c(for hooks and board)\n\

  • General Changes: 
    • Display FSBL Banner and Device ID

Module Specific:

  • Add Files: all TE Files start with te_*
    • READ MAC from EEPROM and make Address accessible by UBOOT (need copy defines on uboot  platform-top.h)
    • CPLD access
    • Read CPLD Firmware and SoC Type
    • Configure Marvell PHY
    • Configure ADV7511
    • Configure Video Timing Controller core
    • Configure VDMA core and enable transfers

zynq_fsbl_flash

TE modified 2019.2 FSBL

General:

  • Modified Files: main.c
  • General Changes:
    •  Display FSBL Banner
    • Set FSBL Boot Mode to JTAG
    • Disable Memory initialisation

U-Boot

U-Boot.elf is generated with PetaLinux. Vitis is used to generate Boot.bin.

Software Design -  PetaLinux

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Note:
  • optional chapter separate

  • sections for linux

  • Add "No changes." or "Activate: and add List"

For PetaLinux installation and  project creation, follow instructions from:

Config

Start with petalinux-config or petalinux-config --get-hw-description

Select Image Packaging Configuration ==> Root filesystem type ==> Select SD Card

Changes:

  • # CONFIG_SUBSYSTEM_ROOTFS_INITRAMFS is not set

  • # CONFIG_SUBSYSTEM_ROOTFS_INITRD is not set

  • # CONFIG_SUBSYSTEM_ROOTFS_JFFS2 is not set

  • # CONFIG_SUBSYSTEM_ROOTFS_NFS is not set

  • CONFIG_SUBSYSTEM_ROOTFS_SD=y

  • # CONFIG_SUBSYSTEM_ROOTFS_OTHER is not set

U-Boot

Start with petalinux-config -c u-boot

Changes:

  • CONFIG_ENV_IS_NOWHERE=y
  • # CONFIG_ENV_IS_IN_SPI_FLASH is not set

Change platform-top.h:

Code Block
languagejs

#include <configs/platform-auto.h>


#define UBOOT_ENV_MAGIC 0xCAFEBABE
#define UBOOT_ENV_MAGIC_ADDR 0xFFFFFC00
#define UBOOT_ENV_ADDR 0xFFFFFC04


#define CONFIG_SYS_BOOTM_LEN 0xF000000
#define DFU_ALT_INFO_RAM \
Code Block
languagejs
/include/ "system-conf.dtsi"
/ {
};

/ {
    memory {    // Reduce memory for framebuffers
        device_type = "memory";
        reg = <0x0 0x3FC00000>;  // Reduce memory for 1GB assembly variant
      //  reg = <0x0 0x1FC00000>;  // Reduce memory for 1GB assembly variant
      //  reg = <0x0 0x0FC00000>;  // Reduce memory for 1GB assembly variant
    };


    framebuffer0: framebuffer@0x3FC00000 {      // HDMI out
        compatible = "simple-framebuffer";
        reg = <0x3FC00000 (1280 * 720 * 4)>;    // 720p
        width = <1280>;                         // 720p
        height = <720>;                         // 720p
        stride = <(1280 * 4)>;                  // 720p
        format = "a8b8g8r8";
    };

/* 
    framebuffer0: framebuffer@0x1FC00000 {      // HDMI out
        compatible = "simple-framebuffer";
        reg = <0x1FC00000 (1280 * 720 * 4)>;    // 720p
        width = <1280>;                         // 720p
        height = <720>;                         // 720p
        stride = <(1280 * 4)>;                  // 720p
        format = "a8b8g8r8";
    };
*/
/* 
    framebuffer0: framebuffer@0x0FC00000 {      // HDMI out
        compatible = "simple-framebuffer";
        reg = <0x0FC00000 (1280 * 720 * 4)>;    // 720p
        width = <1280>;                         // 720p "dfu_ram_info=" \
        height = <720>; "setenv dfu_alt_info " \
        "image.ub ram $netstart 0x1e00000\0" \
        "dfu_ram=run dfu_ram_info &&  // 720pdfu 0 ram 0\0" \
        stride = <(1280 * 4)>;     "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"

#define DFU_ALT_INFO_MMC \
        "dfu_mmc_info=" \
    // 720p
   "set dfu_alt_info " \
  format = "a8b8g8r8";
    };
*/
};

&axi_vdma_0 {"${kernel_image} fat 0 1\\\\;" \
   status = "disabled";
};

&v_tc_0 {
  "dfu_mmc=run  //xilinx-vtc: probe of 43c20000.v_tc failed with error -2
dfu_mmc_info && dfu 0 mmc 0\0" \
      status = "disabled";
}; "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"


/*Required defaultfor uartless designs */

/* Flash */
&qspi {
    flash0: flash@0 {
        compatible = "w25q256";
    };
};

/* ETH PHY */
&gem0 {
    phy-handle = <&phy0>;
    mdio {
#ifndef CONFIG_BAUDRATE
#define CONFIG_BAUDRATE 115200
#ifdef CONFIG_DEBUG_UART
#undef CONFIG_DEBUG_UART
#endif
#endif

/*Dependencies for ENV to be stored in EEPROM. Ensure environment fits in eeprom size*/
#ifdef CONFIG_ENV_IS_IN_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         1
#define CONFIG_SYS_I2C_EEPROM_ADDR           #address-cells = <1>;0x54
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       #size-cells = <0>;
    4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
#define CONFIG_SYS_EEPROM_SIZE    phy0: phy@0 {
           1024 compatible/* = "marvell,88e1510";
 Bytes */
#define CONFIG_SYS_I2C_MUX_ADDR           device_type = "ethernet-phy";
   0x74
#define CONFIG_SYS_I2C_MUX_EEPROM_SEL        reg = <0>;
  0x4
#endif


#define CONFIG_PREBOOT    "echo U-BOOT for petalinux;echo importing env from FSBL shared area at 0xFFFFFC00; if itest *0xFFFFFC00 == 0xCAFEBABE; then echo Found valid magic; env import -t 0xFFFFFC04; fi;setenv preboot; echo; dhcp"

Device Tree

Code Block
languagejs
/include/ "system-conf.dtsi"
/ {
};
 
 
/ {
    memory {    // Reduce memory for framebuffers };
    };
};

/* USB PHY */

/{
    usb_phy0: usb_phy@0 {
        compatible = "ulpi-phy";
        //compatible = "usb-nop-xceiv";
        #phy-cells = <0>;
        regdevice_type = <0xe0002000 0x1000>"memory";
        view-portreg = <0x0 <0x0170>0x3FC00000>;
  // Reduce memory for 1GB assembly drv-vbus;variant
    };
};

&usb0 {
    dr_mode = "host";  //  reg = <0x0 0x1FC00000>;  // Reduce memory for 1GB assembly variant
      //dr_mode = "peripheral";
reg =   usb-phy = <&usb_phy0>;
};

/* I2C need I2C1 connected to te0720 system controller ip */
&i2c1 {
<0x0 0x0FC00000>;  // Reduce memory for 1GB assembly variant
    };
 
 
    iexp@20framebuffer0: framebuffer@0x3FC00000 {       // GPIOHDMI in CPLDout
        #gpio-cellscompatible = <2>"simple-framebuffer";
        compatiblereg = "ti,pcf8574";
     <0x3FC00000 (1280 * 720 * 4)>;   reg =// <0x20>;720p
        gpio-controller;
width = <1280>;  };

    iexp@21 {       // GPIO in CPLD
        #gpio-cells = <2>;// 720p
        compatibleheight = "ti,pcf8574"<720>;
        reg = <0x21>;
        gpio-controller;
    };

       // 720p
        stride = <(1280 * 4)>;         rtc@6F {        // Real Time Clock720p
        compatibleformat = "isl12022";
  a8b8g8r8";
    };
 
/*
    framebuffer0: framebuffer@0x1FC00000 {      reg// =HDMI <0x6F>;out
    };
};

Kernel

Activate:

  • RTC_DRV_ISL12022
  • CONFIG_FB_SIMPLE
  • CONFIG_LOGO
  • CONFIG_LOGO_LINUX_MONO
  • CONFIG_LOGO_LINUX_VGA16
  • CONFIG_LOGO_LINUX_CLUT224

Rootfs

Activate:

  • i2c-tools

Applications

startup

Script App to load init.sh from SD Card if available.

See: \os\petalinux\project-spec\meta-user\recipes-apps\startup\files

Additional Software

HTML
<!--
Add Description for other Software, for example SI CLK Builder ...
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No additional software is needed.

Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

    compatible = "simple-framebuffer";
        reg = <0x1FC00000 (1280 * 720 * 4)>;    // 720p
        width = <1280>;                         // 720p
        height = <720>;                         // 720p
        stride = <(1280 * 4)>;                  // 720p
        format = "a8b8g8r8";
    };
*/
/*
    framebuffer0: framebuffer@0x0FC00000 {      // HDMI out
        compatible = "simple-framebuffer";
        reg = <0x0FC00000 (1280 * 720 * 4)>;    // 720p
        width = <1280>;                         // 720p
        height = <720>;                         // 720p
        stride = <(1280 * 4)>;                  // 720p
        format = "a8b8g8r8";
    };
*/
};

&axi_vdma_0 {
   status = "disabled";
};
 
&v_tc_0 {
    //xilinx-vtc: probe of 43c20000.v_tc failed with error -2
    status = "disabled";
};

 
/* default */
 
/* QSPI PHY */
&qspi {
    #address-cells = <1>;
    #size-cells = <0>;
    status = "okay";
    flash0: flash@0 {
        compatible = "jedec,spi-nor";
        reg = <0x0>;
        #address-cells = <1>;
        #size-cells = <1>;
    };
};
 
 
/* ETH PHY */
&gem0 {
    phy-handle = <&phy0>;
    mdio {
        #address-cells = <1>;
        #size-cells = <0>;
        phy0: phy@0 {
            compatible = "marvell,88e1510";
            device_type = "ethernet-phy";
            reg = <0>;
        };
    };
};
 
/* USB PHY */
 
/{
    usb_phy0: usb_phy@0 {
        compatible = "ulpi-phy";
        //compatible = "usb-nop-xceiv";
        #phy-cells = <0>;
        reg = <0xe0002000 0x1000>;
        view-port = <0x0170>;
        drv-vbus;
    };
};
 
&usb0 {
    dr_mode = "host";
    //dr_mode = "peripheral";
    usb-phy = <&usb_phy0>;
};
 
/* I2C need I2C1 connected to te0720 system controller ip */
&i2c1 {
 
    iexp@20 {       // GPIO in CPLD
        #gpio-cells = <2>;
        compatible = "ti,pcf8574";
        reg = <0x20>;
        gpio-controller;
    };
 
    iexp@21 {       // GPIO in CPLD
        #gpio-cells = <2>;
        compatible = "ti,pcf8574";
        reg = <0x21>;
        gpio-controller;
    };
 
    rtc@6F {        // Real Time Clock
        compatible = "isl12022";
        reg = <0x6F>;
    };
};

Kernel

Start with petalinux-config -c kernel

Changes:

  • RTC_DRV_ISL12022
  • CONFIG_FB_SIMPLE
  • CONFIG_LOGO
  • CONFIG_LOGO_LINUX_MONO
  • CONFIG_LOGO_LINUX_VGA16
  • CONFIG_LOGO_LINUX_CLUT224

Rootfs

File system will be generated with Debian script or Ubuntu script (mkdebian_stretch.sh/mkubuntu_BionicBeaver.sh)

Applications

Applications will be generated with Debian script or Ubuntu script (mkdebian_stretch.sh/mkubuntu_BionicBeaver.sh)

Additional Software

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Note:
  • Add description for other Software, for example SI CLK Builder ...
  • SI5338 and SI5345 also Link to:

No additional software is needed.

Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

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...


  • 2019.2 release

...

  • Initial release

...

  • Ubuntu/Debian as root file system
2018-02-13v.

...

10John Hartfiel
  • 2017.2 release

All

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Legal Notices

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IN:Legal Notices