TE0630 is provided with a Dip switch S1B.
Dip switch S1B conditions the value of signal PS_EN.
In this way, S1B conditionally/unconditionally enables the power rails 1.2 V, 1.5 V and 2.5 V.
Note. DNP: Do Not Populate aka Do Not Solder the Component associated to DNP label.
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Please note the 4 switch labels are on one side and the <ON> label is on the opposite side.
DIP slide switches S1[A:D] condition the value of some system signals as described in the table below.
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When S1B is turned off (open) (FX2 PON position), the 1.2 V, 1.5 V and 2.5 V power rails are controlled by the USB (EZ-USB FX2LP USB FX2) microcontroller. At start-up, the USB microcontroller switches off the power rails 1.2 V, 1.5 V and 2.5 V and starts up the module in low-power mode. After enumeration, the USB microcontroller firmware enables (switches on) the power rails 1.2 V, 1.5 V and 2.5 V, if enough current is available from the USB bus.
When S1B is turned on (closed) (PON position), the power rails 1.2 V, 1.5 V and 2.5 V are always enabled (switched on).
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Table 14: Dip switch S1B settings overview (power rails 1.2 V, 1.5V and 2.5 V only).
To command signal FX2_PS_EN, read the reference firmware code.
IOD = 0x03; // Enable PS_EN and disable PROG_B
OED = 0x03; // Configure PS_EN and PROG as outputs
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Table from EZ-USB(R) Technical Reference Manual (EZ-USB_TRM.pdf)
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Signal PS_EN enables (1) or disables (0) power rails 1.2 V, 1.5 V and 2.5 V.
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Power-rail 3.3V is not controlled by signal PS_EN and is unconditionally enabled.
Figure 37:
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According to the corresponding assembly option, power rail VCCCIO0 |
(enabled by PS_EN and switch S1B ) can depend or not on the power rail 2.5V. |
Figure 37: example of VCCIO0 assembly not dependent on 2.5V power rail. The other way is also possible.See section "FPGA I/O banks power supply" here.
When Dip switch S1B is in the left position ( = FX2 PON : power rails conditionally on depending on signal FX2_PS_EN), signal PS_EN is set to signal FX2_PS_EN (PS_EN = FX2_PS_EN) driven by the EZ-USB FX2LP USB FX2 microcontroller under user control (IOD and OED of fw.c).
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Full power operation (PS_EN = 1): when Dip switch S1B is in the right position (PON = power rails unconditionally on), signal PS_EN is set to power rail 3.3V. Thus power rails 1.2 V, 1.5 V and 2.5 V are unconditionally enabled.
Figure 39:
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Table 14 The table below summarizes all switching options implied by Dip switch S1B and firmware signal FX2_PS_EN (under the standard assembly option).
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(1) R102 unpopulated / R103 populated (2) R102 populated / R103 unpopulated |
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Table 40: Dip switch S1B settings overview ( 1.2 V, 1.5 V , 2.5 V, VCCIO0).
Dip switch S1B can be replaced by one resistors in the following cases:
Assembly option when resistor R17 not populated and R19 populated is equivalent to Dip switch S1B permanently set to PON.
Figure 41: assembly option: S1B = PON.
Assembly option when resistor R17 populated and R19 not populated is equivalent to Dip switch S1B permanently set to FX2 PON.
Figure 42: Assembly option: S1B = FX2 PON.
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