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Frequency meter? So simple you may say. Yes, sure. But doing FPGA based frequency meter that can be instantly used by thousands of of engineers? Hm.. once long time ago I did a JTAG controlled in FPGA Frequency meter IP Core and PC GUI application for it also. I think I wanted to have some pictures and links to Xilinx and yes I did got at least semi-official "green" from them to-do so. The GUI application talked over LPT Based JTAG adapter and did some clever tricks to measure the frequency on some FPGA pin without the use of any known reference clock in the FPGA. As part of that work I did get from semi-official channels schematic of original Xilinx Parallel Cable IV. In order to support it I did create a Coolrunner JEDEC to VHDL conversion tool. I also had a ideas about integration with Chipscope IP Cores, so I did some reverse engineering on the Chipscope ICON.

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LPT Ports are long past history, so bringing back in live that old design makes no sense. Maybe the use for all FPGA based simple Frequency counter is already done? There are options of course, Altium has on-chip instrumentation that includes Frequency meter (if I recall it correctly). But Altium FPGA support is something that is maybe fun for educational purposes not much usable for real life.

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Utilization report: Frequency counter core uses no clock buffers (assuming the reference clock has a global buffer already). Frequency counter uses 1 DSP48E per channel, and 1 DSP48 DSP48E for the reference clock. All clock measurement nets are driving exactly one load, the clock input of the DSP48E primitive, there is no other connections on that net. So it is irrelevant if the net is driven by some buffer or fabric local routing, the frequency performance of the channel is the same.

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