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TE0300 is provided with a slide switch S3.
Slide switch S3 conditions the value of signal PS_EN.
In this way, S3 conditionally/unconditionally enables the power rails 1.2 V and 2.5 V power rails.Image Removed
Figure 33:

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 When S3 is turned on (closed, FX2 PON), the 1power rails 1.2 V and 2.5 V power rails are controlled by the USB (EZ-USB FX2LP USB FX2) microcontroller. At start-up, the USB microcontroller switches off the power rails 1.2 V and 2.5 V power rails and starts up the module in low-power mode. After enumeration, the USB microcontroller firmware enables (switches on) the power rails 1.2 V and 2.5 V power rails on, if enough current is available from the USB bus.

When S3 is turned off (open, PON), the 1power rails 1.2 V and 2.5 V power rails are always enabled (switched on).

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Scroll pdf title
title Slide switch S3 settings overview ( power rails 1.2 V and 2.5 V only)
S3 position Default position Effect on 1.2 V and 2.5 V power rails FX2 PON (on, closed)  1.2 V and 2.5 V rails controlled by USB FX2 microcontroller (signal FX2_PS_EN) PS_EN = FX2_PS_EN = 1 or 0 PON (off, open) 1.2 V and 2.5 V rails always enabled (PS_EN = 1) PS_EN ≠ FX_PS_EN = 1 or 0

Table 14: Slide switch S3 settings overview (1.2 V and 2.5 V rails only).

 Signal FX2_PS_EN

To command signal FX2_PS_EN, read the reference firmware code.
IOD = 0x03; // Enable PS_EN and disable PROG_B
OED = 0x03; // Configure PS_EN and PROG as outputs

 

Scroll pdf title
title USB FX2 microcontroller configuration table
Port D Pin Alternate Function Alternate Function is Selected By... Alternate Function is Described in... PD.7:0 FD[15:8] IFCFG1 = 1 and any WORDWIIDE bit = 1 Slave FIFOs chapter 9 on page 99 Table from EZ-USB(R) Technical Reference Manual (EZ-USB_TRM.pdf).

Signal PS_EN

• Signal PS_EN enables (1) or disables (0)  power rails 1.2

  .5V

  V and

  1

  2.

  2V

  5 V.

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  Figure 36: Power rails 2.5V and 1.2V

  Scroll pdf title
  title Power rails 1.2 V and 2.5 V could be enabled/disabled by signal PS_EN

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• Power-rail 3.3V is not controlled by signal PS_EN and is unconditionally enabled. 
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  Figure 37: Power rails 3.3V could not be enabled/disabled by signal PS_EN.
   The 3power-rail 3.3 V power-rail though is out of the control of the USB-microcontroller and is supplied down-converting the power supply 5 V power supply provided by either the USB-bus or the B2B receptacle connector. In this case, signals that are applied to the 3.3 V I/O banks do not need to be disconnected when power-rails are disabled by the USB microcontroller. 

  Scroll pdf title
  title Power rail 3.

VCCIO

• 3V could not be enabled/disabled by signal PS_EN

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VCCIO0 assembly options

According to the corresponding assembly option, power rail VCCCIO0 can depend or not on the power rail 2.5V power rail.

Voltage VccIO for bank B0 shall span from 1.2 V to 3.3 V. VccIO can be supplied either externally or internally to the micromodule.

Warning
Warning! Spartan-3 I/Os are not 5 V tolerant. Applying more than the recommended operating voltages at any pin, results in a damaged FPGA (see Xilinx Answer AR#19146).

Externally Supplied

VccIO

VCCIO

 VccIO can be externally supplied over the B2B connector J4. If bank B0 is not used, then VccIO can be left open.

Internally Supplied

VccIO

VCCIO

If VccIO is not externally supplied, it can be internally supplied by one of the internal power rails of 2.5 V and 3.3 V. This is possible by short-circuiting one of the two pad pairs placed on the right of connector J4 at the top right corner of the bottom side of the micromodule.

Two suitable ways of shirt-circuiting the paid pair are by means of a zero-ohm 0603 (1608 metric) chip resistor or a solder blob.

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Figure 37: example of VCCIO0 assembly not dependent on 2.5V power rail. The other way is also possible.

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Figure 9

Scroll pdf title
title The soldering of R102 and R103 are mutually exclusive.
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Scroll pdf title
title The figure shows how to short-circuit VccIO to internal power rail 3.3 V. FX2_PS_EN does not control VCCCIO0 (3.3V) FPGA bank 0
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When slide switch S3 is in the left position ( = FX2 PON : power rails conditionally on depending on signal FX2_PS_EN), signal PS_EN is set to signal FX2_PS_EN (PS_EN = FX2_PS_EN) driven by the EZ-USB FX2LP USB FX2 microcontroller under user control (IOD and OED of fw.c).

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1. Dynamic full power operation (PS_EN = 1): when the EZ-USB FX2LP USB FX2 microcontroller sets signal PS_EN = FX2_PS_EN = 1, power rails 1.2 .5V V and 12.2V 5 V are enabled.
   This setting can be useful for .
2. Dynamic low power operation (PS_EN = 0): when the EZ-USB FX2LP USB FX2 microcontroller resets signal PS_EN = FX2_PS_EN = 0, the following components are switched off:

• FPGA core logic (1.2V)
• DDR SDRAM (2.5V)
• FPGA bank 3 1 (2.5V)
• VREF (2.5V)

• VCCCIO0 (2.5V) FPGA bank 0 (if R102+R103- assembly)

Slide Switch S3 = PON 

Table 14 The table below summarizes all switching options implied by slide switch S3 and firmware signal FX2_PS_EN (under the standard assembly option).

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Table 40: Slide switch S3 settings overview ( 1.2V , 2.5V, VCCIO0).

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