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SPI pins on B2B connector J5 cannot be used as GPIOs (general purpose I/Os).
Scroll pdf title
titleSPI pin-out summary; SPI signal details (bank 2).
ball

name

FPGA FPGA pin

J5 pin

SPI_Q 

IO_L03N_2

no

SPI_D 

IO_L16N_2

no

SPI_/C

 

IO_L26N_2

no

SPI_/S

 

IO_L01P_2

no

Warning


 

The SPI bus can be used during configuration and operation in a plurality of ways as summarized respectively in Table A (SPI bus for configuration) and Table B (SPI bus for operation).

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Scroll pdf title
titleTable A: SPI bus modes for configuration.
master
(SPI_/S = 0)

description

usage

EZ-USB FX2LP

FPGA

B2B J5

serial Flash

EZ-USB â-º Flash

OpenFUT
API

master

off
(S3 = FX2PON,
FX2_PS_EN = 0)

deselected

slave

FPGA â—„ Flash

OpenFUT
API

inactive
SPI_* = Z

master
(SPI_/S = 1)

deselected

slave

B2B J5 â-º Flash

custom

inactive
SPI_* = Z

off
(S3 = FX2PON,
FX2_PS_EN = 0)

slave

...

SPI

...

SPI bus for operation

A plurality of usage combinations of the SPI bus during operation is made available to the user as suggested in Table B below.

Scroll pdf title
titleTable B: SPI bus modes for operation.
deselected

description

usage

EZ-USB FX2LP

FPGA

B2B J5

serial Flash

EZ-USB â—„â-º Flash

custom

master

off
(S3 = FX2PON,
FX2_PS_EN = 0)

deselected

slave

FPGA â—„â-º Flash

custom

inactive
SPI_* = Z

master
(SPI_/S = 1)

deselected

slave

B2B J5 â—„â-º Flash

custom

inactive
SPI_* = Z

off
(S3 = FX2PON,
FX2_PS_EN = 0)

master
(SPI_/S = 0)

slave

EZ-USB â—„â-º B2B J5

custom

master
SPI_/S = 1

off
(S3 = FX2PON,
FX2_PS_EN = 0)

slave

deselected

EZ-USB â—„â-º B2B J5

custom

slave
SPI_/C = Z

off
(S3 = FX2PON,
FX2_PS_EN = 0)

master
(SPI_/S = 1)

Warning
Other combinations of master and slave units are neither supported nor recommended.