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Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.

Reference Design is available on:

• TEI0??? TEI0050 "Test Board" Reference Design

Design Flow

Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.

See also:

• Project Delivery - Intel devices

The Trenz Electronic FPGA Reference Designs are TCL-script based projects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.

TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win OS and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality

1. Open create_project_win.cmd/create_project_linux.sh:
   
2. Select Board in "Board selection"
3. Click on "Create project" button to create project
   
   1. (optional for manual changes) Select correct quartus installation path in "<project folder>/settings/design_basic_settings.tcl"
   Create and configure your Yocto Linux project, see Yocto KICKstart
4. Copy the generated meta-<module> folder from <project name>/os/yocto/meta-<module> to the path/to/yocto/poky/ directory
5. Follow the steps from Yocto KICKstart#Create a project for an Intel FPGA device without running the 'bitbake' command

Add the generated bsp layer meta-<machine> to path/to/yocto/poky/build/conf/bblayers.conf with:

Code Block
theme Midnight linenumbers true
bitbake-layers add-layer ../meta-<module>

Info
Note: The generated meta-<module> layer depends on the meta-altera layer (for more information see: Yocto KICKstart#Used source files), so you need to add both bsp layers to bblayers.conf

Redefine the variable MACHINE with '<module>-<Board-Part-Short-Name>' in path/to//yocto/poky/build/conf/local.conf. The correct MACHINE name can be found in the #Hardware table.
Also define the variables INITRAMFS_IMAGE_BUNDLE and INITRAMFS_IMAGE to generate a ram disk image.

Code Block
theme Midnight linenumbers true
sed -i '/^MACHINE/s/MACHINE/#MACHINE/g' conf/local.conf echo -e '\nMACHINE = "<module>-<Board-Part-Short-Name>"' >> conf/local.conf echo -e '\nINITRAMFS_IMAGE_BUNDLE = "1"' >> conf/local.conf echo -e 'INITRAMFS_IMAGE = "te-initramfs"' >> conf/local.conf

Build the image with following command (the image recipes are located in meta-<module>/recipes-core/images/):

Code Block
theme Midnight linenumbers true
bitbake te-image-minimal

Launch

Programming

Get prebuilt files

1. Run create_project_win.cmd/create_project_linux.sh
2. Select Module in 'Board selection'
3. Click on 'Export prebuilt files' button
   1. Folder <project folder>/_binaries_<Article Name> with subfolder programming_files will be generated and opened

QSPI

1. Connect JTAG and power on carrier with module
2. Open create_project_win.cmd/create_project_linux.sh
3. Select correct board in "Board selection"
4. Click on "Program device" button
   1. if prebuilt files are available: select "Program prebuilt file"
   2. using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
   3. (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
5. Click on "Start program device" button

JTAG

Not used on this example.

Usage

1. Prepare HW like described on section Programming
2. Connect UART USB (most cases same as JTAG)

UART

1. Open Serial Console (e.g. PuTTY)

   1. select COM Port

      Info
      Win OS: see device manager Linux OS: see ls -l dev/serial/by-id  (UART is *USB1)

      
      

   2. Speed: 115200
2. Press reset button S1
3. Press user button S2 to toggle between different LED sequences
4. Console output depends on used Software project, see Software Design - SDK#Application

System Design - Quartus

Programming

Get prebuilt boot binaries

1. Run create_project_win.cmd/create_project_linux.sh
2. Select Module in 'Board selection'
3. Click on 'Export prebuilt files' button
   1. Folder <project folder>/_binaries_<Article Name> with subfolder boot_linux will be generated and opened

SD-Boot mode

Run following command to get the device name of the SD card  (e.g. /dev/sdx):

lsblk

sudo umount /dev/sdx
sudo sfdisk --delete /dev/sdx

Create required partitions on the SD card (partition 1: 50MB, FAT32 / partition 2: 2MB, a2) 

echo -e ',50M,c\n,2M,a2' | sudo sfdisk /dev/sdb --force
sudo mkfs.vfat -F 32 -n boot /dev/sdb1

Copy the u-boot file to partition 2 of the SD card

sudo dd if=path/to/_binaries_<Article Name>/boot_linux/u-boot-with-spl.sfp of=/dev/sdb2 bs=1M seek=0
sync

QSPI-Boot mode

Option for u-boot-with-spl.sfp on QSPI flash and zimage-initramfs-<Yocto Machine Name>.bin, <Yocto Machine Name>.dtb, soc_system.rbf and extlinux/extlinux.conf on SD card.

Use files from "<project folder>\_binaries_<Article Name>\boot_linux" from generated binary folder,see: #Get prebuilt boot binaries

Run following commands:

quartus_hps -c 1 -o pv -a 0x0 path/to/_binaries_<Article Name>/boot_linux/u-boot-with-spl.sfp

QSPI

1. Connect JTAG and power on carrier with module
2. Open create_project_win.cmd/create_project_linux.sh
3. Select correct board in "Board selection"
4. Click on "Program device" button
   1. if prebuilt files are available: select "Program prebuilt file"
   2. using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
   3. (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
5. Click on "Start program device" button

JTAG

Not used on this example.

Usage

1. Prepare HW like described on section TEI0050 Intel Test Board
2. Connect UART USB (most cases same as JTAG)
3. Connect your board to the network
4. Power on PCB

UART

select COM Port

Login data:

Username: root
Password: root

You can use Linux shell now.

i2cdetect -y -r 1   (check I2C 1 Bus)
dmesg | grep rtc    (RTC check)
udhcpc              (ETH0 check)
lsusb               (USB check)

Block Design

The block designs may differ depending on the assembly variant.

Software Design - SDK

Application

Used software project depends on board assembly variant. Template location: <project folder>/source_files/software/

hello_tei0050

'hello_tei0050' is a Hello World example as endless loop instead of one console output.

System Design - Quartus

Block Design

The block designs may differ depending on the assembly variant.

HPS Interfaces

Activated interfaces:

Software Design - SDK

Application

Used software project depends on board assembly variant. Template location: <project folder>/source_files/software/

...

Software Design - Yocto

For Yocto installation and project creation, follow instructions from:

• Yocto KICKstart
• Create a custom BSP layer for Intel SoC or FPGA

U-Boot

Start with Create a custom BSP layer for Intel SoC or FPGA#Configure u-boot

File location: meta-<module>/recipes-bsp/u-boot/

Changes:

• No changes

Device Tree

U-boot Device Tree

#u-boot device_tree.dts
/ {
};

#device_tree-u-boot.dts
/ {
};

Kernel Device Tree

#kernel device_tree.dts
/ {
};

Kernel

File location: meta-<module>/recipes-kernel/linux/

Changes:

• No changes.

Images

Image recipe for minimal console image

File location: meta-<module>/recipes-images/yocto/

Image recipes:

• te-image-minimal.bb: create minimal linux image
• te-initramfs.bb: required for building an image with initial RAM Filesystem

Added packages/recipes:

• No packages/recipes

Rootfs

Used filesystem: Initial RAM Filesystem (initramfs)

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