Page History

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Template Revision 2.312

Module: TRM Name always "TE Series Name" +

TRM, for example "TE0720

TRM
Example: "TE0728 TRM"
Carrier: TRM Name usually "TEB Series Name" +TRM
Example: "TEB0728 TRM"

HTML

<!-- tables have all same width (web max 1200px and pdf full page(640px), flexible width or fix width on menu for single column can be used as before) -->
<style>
.wrapped{
  width: 100% !important;
  max-width: 1200px !important;
 }
</style>

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Important General Note:

If some section is configurable and depends on Firmware, please refer to the addition page (for example CPLD). If not available, add note, that this part is configurable

Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)

Figure template:

Scroll Title

anchor	Figure_anchorname
title	Text

Scroll Ignore
Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Scroll Only
image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

Table template:
- Layout macro can be use for landscape of large tables
Scroll Title
anchor Table_tablename
title Text
Scroll Table Layout
orientation portrait
sortDirection ASC
repeatTableHeaders default
style
widths
sortByColumn 1
sortEnabled false
cellHighlighting true
Example Comment
1 2

The anchors of the Scroll Title should be named consistant across TRMs. A incomplete list of examples is given below
- <type>_<main section>_<name>
  - type: Figure, Table
  - main section:
    - "OV" for Overview
    - "SIP" for Signal Interfaces and Pins,
    - "OBP" for On board Peripherals,
    - "PWR" for Power and Power-On Sequence,
    - "B2B" for Board to Board Connector,
    - "TS" for Technical Specification
    - "VCP" for Variants Currently in Production
    - "RH" for Revision History
  - name: custom, some fix names, see below
- Fix names:
  - "Figure_OV_BD" for Block Diagram
  - "Figure_OV_MC" for Main Components
  - "Table_OV_IDS" for Initial Delivery State
  - "Table_PWR_PC" for Power Consumption
  - "Figure_PWR_PD" for Power Distribution
  - "Figure_PWR_PS" for Power Sequence
  - "Figure_PWR_PM" for Power Monitoring
  - "Table_PWR_PR" for Power Rails
  - "Table_PWR_BV" for Bank Voltages
  - "Table_TS_AMR" for Absolute_Maximum_Ratings
  - "Table_TS_ROC" for Recommended_Operating_Conditions
  - "Figure_TS_PD" for Physical_Dimensions
  - "Table_VCP_SO" for TE_Shop_Overview
  - "Table_RH_HRH" for Hardware_Revision_History
  - "Figure_RH_HRN" for Hardware_Revision_Number
  - "Table_RH_DCH" for Document_Change_History
Use Anchor in the document: add link macro and add "#<anchorname>
Refer to Anchror from external : <page url>#<pagename without space characters>-<anchorname>

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Note for Download Link of the Scroll ignore macro:

Link to the base folder of the module (remove de/ or en/ from the URL): for example
Example: https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0703TE0728/

Scroll Ignore
Download PDF version of this document.

Scroll pdf ignore

Table of Contents

Table of Contents

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The Trenz Electronic TEP0002 is a Pmod compatible motor driver board and good used for developing BLCD or CD motor driving software.

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Modules/ SoC FPGA
- Compatible with Digilent's Pmod interfaces
RAM/Storage
On Board
- 1x 4x Current Sensor
- 1x 4x ADC
- 2x Terminal Blocks
- 2x Power Regulators
- 3x Half-Bridge Drivers
Interface
- 2x Pmod Pin Header (2x6 Pol)
Power
- 3.3V supply voltage from Pmods
- Supply current and voltage monitoring
Dimension
- 40 mm x 40 mm

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Scroll Title

anchor	Figure_OV_BD
title	TEP0002 block diagram

Scroll Ignore

draw.io Diagram

border	false
viewerToolbar	true

fitWindow	false
diagramName	TEP0002_block
simpleViewer	false
links	auto
tbstyle	hidden
lbox	true
diagramWidth	641
revision	1116

Scroll Only

Main Components

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Scroll Title

anchor	Figure_OV_MC
title	TEP0002 main components

Scroll Ignore

draw.io Diagram

border	false
viewerToolbar	true

fitWindow	false
diagramName	TEP0002_MC
simpleViewer	false
links	auto
tbstyle	hidden
lbox	true
diagramWidth	641
revision	57

Scroll Only

2x6 PMod 2x6 Peripheral Header, J2J1
2x6 PMod 2x6 Peripheral Header, J1J2
Power Regulators, U1-U7Hall Effect Linear Current Sensor,
UHalf Bridge Gate Drivers, U14-U17-U20
Current Sensors, U15-U18-U21-U46
ARK500-2 screw connector, J2
ARK500-3 screw connector, J3
Analog Digital Converter

Connectors

J1 connector

...

J2 connector

...

J3 connector

...

J4 connector

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Initial Delivery State

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id	Comments

Notes :

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

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anchor	Table_OV_IDS
title	Initial delivery state of programmable devices on the module

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Storage device name

...

Content

...

Notes

...

Quad SPI Flash

, U16-U19-U22-U47

Initial Delivery State

Page properties

hidden	true
id	Comments

Notes :

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

Scroll Title

anchor	Table_OV_IDS
title	Initial delivery state of programmable devices on the module

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Storage device name	Content	Notes
---	---	---

Configuration Signals

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Overview of Boot Mode, Reset, Enables.

Scroll Title

anchor	Table_OV_BP
title	Boot process.

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

MODE Signal State	Boot Mode
---	---

Scroll Title

anchor	Table_OV_RST
title	Reset process.

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Signal	B2B	I/O	Note
---	---	---

Signals, Interfaces and Pins

Page properties

hidden	true
id	Comments

Notes :

For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
- SD
- USB
- ETH
- FMC
- ...
For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
- JTAG
- UART
- I2C
- MGT
- ...

Pmod Connectors

TEP0002 is equipped with two 2x6 Pmod Connectors, J1 and J2.

...

Configuration Signals

...

hidden	true
id	Comments

...

Scroll Title

anchor	Table_OVSIP_BPPmod
title	Boot process.General Pmod connectors information

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

MODE Signal State

Boot Mode

Scroll Title

anchor	Table_OV_RST
title	Reset process.

Scroll Table Layout

orientation

portrait

sortDirection

ASC

repeatTableHeaders

default

style

widths

sortByColumn

1

sortEnabled

false

cellHighlighting

true

Signal

B2B

I/O

Note

Signals, Interfaces and Pins

Page properties

hidden	true
id	Comments

Notes :

For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
- SD
- USB
- ETH
- FMC
- ...
For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
- JTAG
- UART
- I2C
- MGT
- ...

Board to Board (B2B) I/Os

FPGA bank number and number of I/O signals connected to the B2B connector:

Pin	Pmod J1	Pmod J2
1	PWM_CH0	ADC_CH
2	PWM_CH1	AD_SCK
3	PWM_CH2	ADC_CS
4	N.C	Sensor fault
5	GND	GND
6	VCC	VCC
7	EN_CH0	ADC_DO0
8	EN_CH1	ADC_DO1
9	EN_CH2	ADC_DO2
10	N.C	ADC_DO3
11	GND	GND
12	VCC	VCC

Terminal blocks

The TEP0002 is equipped with two Terminal Blocks J3 and J4.

Voltage Level

Scroll Title

anchor	Table_SIP_TerBlk
title	Terminal Blocks information

scroll-

Scroll Title

anchor	Table_SIP_B2B
title	General PL I/O to B2B connectors information

scroll-tablelayout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

FPGA Bank

Designator

B2B Connector

I/O Signal Count

Pin	Schematic	Notes

anchor	Table_OBP_ETH
title	Ethernet PHY to Zynq SoC connections

Trenz Electronic Documentation

Page History

Versions Compared

Old Version 39

New Version Current

Key

Main Components

Connectors

Initial Delivery State

Initial Delivery State

Configuration Signals

Signals, Interfaces and Pins

Pmod Connectors

Configuration Signals

Signals, Interfaces and Pins

Board to Board (B2B) I/Os

Terminal blocks

On-board Peripherals

Analog Digital Converters

Power and Power-On Sequence

Power Supply

Power Consumption

Quad SPI Flash Memory

Power Distribution Dependencies

LEDs

Power-On Sequence

Power Rails

DDR3 SDRAM

Ethernet

CAN Transceiver

Power and Power-On Sequence

Power Supply

Power Consumption

Power Distribution Dependencies

Power-On Sequence

Voltage Monitor Circuit

Power Rails

Bank Voltages

Technical Specifications

Absolute Maximum Ratings

Recommended Operating Conditions

Physical Dimensions

Currently Offered Variants

Document Change History