Page History

...

• USB communication tests + DMA tests
• full test (USB communication tests + DMA tests + other tests)

USB communication tests (to link)

JTAG and USB connections

Two types of connections are available:

• USB connection (USB (host computer) ↔ USB (TE USB FX2 module))
• JTAG connection (normally a JTAG adapter cable; we recommend using the Xilinx Platform Cable USB (USB (host computer) ↔ JTAG (TE USB FX2 module)) ;

Xilinx EDK/SDK and iMPACT (or equivalent XMD console commands) could be used to develop/generate an FPGA bitstream (with MicroBlaze's processor and software "merged" into an FPGA bitstream). When the FPGA bitstream is ready, either the USB or JTAG connection could be used to write the SPI Flash memory of the TE USB FX2 module (i.e. download the FPGA bitstream into the SPI Flash memory).

The JTAG connection could also be used to directly download the FPGA bitstream into the FPGA without the need of a reset.

The JTAG connection could be used with Xilinx EDK and SDK GUIs for development and debug purposes; XMD console could also be used.

The USB connection CANNOT be used with Xilinx EDK and SDK GUIs for development and debug purposes. The USB connection should be used after the development and debug process.

With a JTAG connection, the development and debug phases are easier.
Without a JTAG connection, the user/developer should create/use custom functions/programs for the debug phase but some JTAG debug features may not be easily replicated through a USB connection.

USB communication tests + DMA tests only

Anchor
USBCommunicationTests USBCommunicationTests

To test the USB communication in the Reference Architecture case is necessary:

• to download the correct reference bitstream file in the FPGA and/or SPI Flash;
• the USB FX2 microcontroller on the TE0300, TE0320 or TE0630 family TE USB FX2 module should contain valid firmware;
• the host computer should have a specific driver installed;
• a USB cable should be used to connect the PC and the FPGA module (USB communication tests and/or power supply);
• run the C# or C++ Reference Project test.

For an example see here.

Full test

...

Info
Use of JTAG connection is necessary.

To completely test the Reference Architecture is necessary:

•     to download the bitstream file (that create the Microblaze system) and the demo.elf file or to be certain that this two are already downloaded before;
•     the USB FX2 microcontroller on the TE0300, TE0320 or TE0630 family TE USB FX2 module should contain valid firmware;
•     the host computer should have a specific driver installed;
•     the host computer should have Xilinx EDK installed;
•     a JTAG adapter cable. We recommend using the Xilinx Platform Cable USB (USB ↔ JTAG) .;
•     a USB cable should be used to connect the PC and the FPGA module (USB communication tests and/or power supply);
• run the C# or C++ Reference Project test (USB communication tests + DMA tests). 

The procedures are the following (a TE0300 board case is described).

not project ( component updates) ; it depends on which computer is used (workstation, regular PC or low-end PC)  run the demo project.

.bit or .mcs direct download iMPACT, OpenFut or OpenFutNet	Procedure SDK: opening and update SDK project only ('updated' SW on 'NOT updated' HW) Compile and link time less than 1 minute.	Procedure XPS+SDK: opening and update both XPS and SDK projects ('updated' SW on '	updated' HW') Resynthesis of reference	HW	could take from 10 minutes to 1 hour	(1)
Skip.	Copy IP Cores and drivers used in TE reference projects
Skip.	Skip.	Update XPS project from an old version to a new one
Skip.	Skip.	Export the HW project design to SDK
Skip.	Open SDK project and (if needed) update the SDK project from an old version to a new one	Recreate SDK project using the new exported HW project;
Skip.	Generate a new link script
Download the reference bitstream to the FPGA using iMPACT, Open_FUT or OpenFutNet	Download the reference bitstream to the FPGA using SDK
Skip.	Run the demo project to run on board tests
Check the fiirmware of FX2 microcontroler
USB communication tests + DMA tests

⁽¹⁾ It depends on which computer is used (workstation, regular PC or low-end PC).

Tip

For old version of Xilinx EDK with older veresion version of Project Reference (they do no longer exist on GitHub) the procedure is the folowing Open the project by double-clicking on the system.xmp file. The Xilinx Platform Studio is opened. If you open the project with a new version of Xilinx XPS, the tool will try to update all the components of MicroBlaze system. In some case it is not possible to refuse the update. To compile the project press the "Download Bitstream to the FPGA" button. If the HDL design was successfully implemented and downloaded to the TE0300/TE0320/TE0630 family TE USB FX2 module, you can proceed to compile the MB software. Press the "build all user applications" button.

Copy IP Cores and drivers used in TE reference projects

Anchor
CopyIPcores CopyIPcores

To use the "demo" application contained in TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Workspace, you should ⁽¹⁾ copy GitHub's "TE-EDK-IP" folder (from https://github.com/Trenz-Electronic/TE-EDK-IP) to the folder that contains the folder "reference-TE0xxx":

1. C:\XilinxProject, if you have copied the folder "TE0xxx-Reference-Designs\reference-TE0xxx" to "C:\XilinxProject" ( "C:\XilinxProject\reference-TE0xxx" and "C:\XilinxProject\TE-EDK-IP");

2. otherwise you must copy the contents of GitHub's 'TE-EDK-IP' folder inside the already existent empty folder "TE0xxx-Reference-Designs\TE-EDK-IP".

Check the firmware of FX2 microcontroler

Anchor
CheckFX2Firmware CheckFX2Firmware

The FX2 microcontroller on the TE0300, TE0320 or TE0630 family TE USB FX2 module should contain valid firmware before proceeding.

• If the FX2 microcontroller has not been programmed before, please follow the instructions here and here. You can use Cypress, Python OpenFut or C# OpenFutNet programs.
• If you are sure that the FX2 microcontroller is properly connected, you can connect to the TE0300/TE0320/TE0630 TE USB FX2 module with a JTAG adapter cable. We recommend using the Xilinx Platform Cable USB.
• Then connect the TE0300/TE0320/TE0630 TE USB FX2 module to a USB cable.

5) Run the demo project

Use the demo project with the XMD UART

...

• .

...

If you want to input some characters to the XMD UART, then open some terminal emulators,such as

• Microsoft / Hilgraeve HyperTerminal (usually included in Windows before Vista START MENU > All programs > Acessories > Communications > Hyper Terminal). 
• ClearTerminal (very easy)

Connect using the following settings:

• No Host address
• Port Number: 4321
• TCP/IP connection type

The UART settings are:

• bits per seconds: 115,200
• data bits: 8
• parity: none
• stop bits: 1
• flow control: none (otherwise you will not be able to enter commands)

Method A) XMD console, automatic

• Configure Jtag_Uart using "Debug" > "Debug Configuration"
• Run XMD console using "Debug" > "Launch XMD"
• Run ClearTerminal Console

Method B) Manual

• Configure debug
• Change perspective from programming to debug selecting "Window" > "Open Perspective" > "Debug"

Scroll Title
title Debug Perspective
Image Removed

The UART port will output something of tis kind:
Before running the demo application, open the #project_root#\xmd.ini file:
1.rst
2.dow sw/test_hw.elf
3.#dow sw/demo.elf
4.run
5.terminal -jtag_uart_server 4321
To run the demo application
uncomment line 3 (remove "#")
comment line 2 (add "#" as first character)
save xmd.ini.
type "exit" in XMD command window
restart XMD by clicking again the "Start XMD" button in the XPS toolbar.
With this application, you can test the PC ↔ FPGA communication using a provided API.

Use the demo project without the XMD UART

To use the demo project without the XMD UART, you need to use "RS232" instead of "debug_module" as standard in/out port. Otherwise the application running on the Microblaze processor freezes if you disconnect the XMD. To accomplish that you need to set up the Microblaze "Software Platform Settings".

• In the dialog window select "OS and libraries" in the left window and pick "RS232" as a stdout and stdin interface.
• Then rebuild the software and download again the project to the FPGA.

The UART is then redirected to external pins, which are defined in the data/system.ucf file. The following snippet shows the case of the TE0300 series modules:

Module RS232 constraints*
Net fpga_0_RS232_RX_pin LOC=B13;
Net fpga_0_RS232_TX_pin LOC=B14;
Please refer to the table below  for other module series relevant to this application note.

...

...