changes.mady.by.user Antti Lukats
Saved on 15 06, 2015
changes.mady.by.user Xiao Chen
Saved on 22 09, 2015
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Example ASIO Demo for TE0711 SoM: a total of 196 I/O pins are connected to single ASIO GPIO IP Core. All ports are mapped to FPGA pins using Vivado board part flow, no manual constraints entered.