Introduction

The reference architecture can be tested in two ways:

• USB communication tests + DMA tests
• full test (USB communication tests + DMA tests + other tests)

JTAG and USB connections

Two types of connections are available:

• USB connection (USB (host computer) ↔ USB (TE USB FX2 module))
• JTAG connection (normally a JTAG adapter cable; we recommend using the Xilinx Platform Cable USB (USB (host computer) ↔ JTAG (TE USB FX2 module)) ;

Xilinx EDK/SDK and iMPACT (or equivalent XMD console commands) could be used to develop/generate an FPGA bitstream (with MicroBlaze's processor and software "merged" into an FPGA bitstream). When the FPGA bitstream is ready, either the USB or JTAG connection could be used to write the SPI Flash memory of the TE USB FX2 module (i.e. download the FPGA bitstream into the SPI Flash memory).

The JTAG connection could also be used to directly download the FPGA bitstream into the FPGA without the need of a reset.

The JTAG connection could be used with Xilinx EDK and SDK GUIs for development and debug purposes; XMD console could also be used.

The USB connection CANNOT be used with Xilinx EDK and SDK GUIs for development and debug purposes. The USB connection should be used after the development and debug process.

With a JTAG connection, the development and debug phases are easier.
Without a JTAG connection, the user/developer should create/use custom functions/programs for the debug phase but some JTAG debug features may not be easily replicated through a USB connection.

USB communication tests + DMA tests only

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USBCommunicationTests USBCommunicationTests

To test the USB communication in the Reference Architecture case is necessary:

• to download the correct reference bitstream file in the FPGA and/or SPI Flash;
• the USB FX2 microcontroller on the TE USB FX2 module should contain valid firmware;
• the host computer should have a specific driver installed;
• a USB cable should be used to connect the PC and the FPGA module (USB communication tests and/or power supply);
• run the C# or C++ Reference Project test.

For an example see here.

Full test

To completely test the Reference Architecture is necessary:

• to download the bitstream file (that create the Microblaze system) and the demo.elf file or to be certain that this two are already downloaded before;
• the USB FX2 microcontroller on the TE USB FX2 module should contain valid firmware;
• the host computer should have a specific driver installed;
• the host computer should have Xilinx EDK installed;
• a JTAG adapter cable. We recommend using the Xilinx Platform Cable USB (USB ↔ JTAG) ;
• a USB cable should be used to connect the PC and the FPGA module (USB communication tests and/or power supply);
• run the C# or C++ Reference Project test (USB communication tests + DMA tests). 

The procedures are the following (a TE0300 board case is described).

⁽¹⁾ It depends on which computer is used (workstation, regular PC or low-end PC).

Copy IP Cores and drivers used in TE reference projects

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CopyIPcores CopyIPcores

To use the "demo" application contained in TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Workspace, you should : ⁽¹⁾ copy GitHub's "TE-EDK-IP" folder (from https://github.com/Trenz-Electronic/TE-EDK-IP) to the folder that contains the folder "reference-TE0xxx":

1. C:\XilinxProject, if you have copied the folder "TE0xxx-Reference-Designs\reference-TE0xxx" to "C:\XilinxProject" ( "C:\XilinxProject\reference-TE0xxx" and "C:\XilinxProject\TE-EDK-IP");

2. otherwise you must copy the contents of GitHub's 'TE-EDK-IP' folder inside the already existent empty folder "TE0xxx-Reference-Designs\TE-EDK-IP".

Tip
From now on, the choice a is assumed.

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Check the firmware of FX2 microcontroler

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CheckFX2Firmware CheckFX2Firmware

The FX2 microcontroller on the TE USB FX2 module

• after this selection the XPS should appear like in this image.
• now you can cancel (or move in another folder) the content of TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Export
• now you can copy all .c and .h file from TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Workspace\demo\src in a temporary folder (C:\demo_src_TE for example)
• now you can cancel all files and folders from TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Workspace
• to compile the project you must click "Project" and then "Export Hardware Design to SDK..."

The HW implementation usually takes some time; if you have a very slow computer, the new synthesis could require an hour.

Update the SDK project

When Xilinx SDK open, you should:

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should contain valid firmware before proceeding.

• If the FX2 microcontroller has not been programmed before, please follow the instructions in the ????? family User Manualshere and here. You can use Cypress, Python OpenFut or C# OpenFutNet programs.
• If you are sure that the FX2 microcontroller is properly connected, you can connect to the TE0300/TE0320/TE0630 TE USB FX2 module with a JTAG adapter cable. We recommend using the Xilinx Platform Cable USB.
• Then connect the TE0300/TE0320/TE0630 module to a USB cable.

If the HDL design was successfully implemented and downloaded to the TE0300/TE0320/TE0630 family module, you can proceed to compile the MB software. Press the "build all user applications" button.

Run the demo project

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• Module RS232 constraints*
  Net fpga_0_RS232_RX_pin LOC=B13;
  Net fpga_0_RS232_TX_pin LOC=B14;
  Please refer to Table 1 for other module series relevant to this application note.

  TE series	RS232_RX FPGA ball	RS232_RX module pin	RS232_TX FPGA ball	RS232_TX module pin
  TE0300	R6 -------->	------->J5-29	P6-------->	------>J5-31
  TE0320	V17------->	--->J5-IO18	W17------>	--->J5-IO19
  TE0630	Y7 -------->	------>J5-29	AB7------>	------->J5-31
  TE0304	It doesn't apply	J1-3	It doesn't apply	J1-2
  TE0323	It doesn't apply	J4-35	It doesn't apply	J4-37
  host (PC)	TX	TX	RX	RX

  Table 1: location of UART pins examples.
  The UART settings are:
  bits per seconds: 115,200
  data bits: 8
  parity: none
  stop bits: 1
  flow control: none (otherwise you will not be able to enter commands)
  The UART port will output something of tis kind:
  -Entering main TE0300 DEMO ver 0x07010218-
  Setting up Interrupt Controller:
  Initialize exception handling
  Register external interrupt handler
  Register I2C_SLAVE interrupt handler
  Enable interrupts in the interrupt controller
  Start the interrupt controller
  Enabling and initializing instruction cache
  Enabling and initializing data cache
  Type:
  'a' RAM test
  'f' RAM Ftest
  'c' toggles caching
  'g' prints switches state and board revision
  't' starts TX transmission
  'r' starts RX transmission
  's' stops all transmissions
  'm' for the redraw menu
  MicroBlaze will work even in case the UART port is left unconnected.
  Sample UART to USB virtual COM port converter.
  Sample UART to USB virtual COM port converter: signal detailTE USB FX2 module to a USB cable.