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Vivado is recommended for all Trenz Electronics products that are based on AMD 7 or UltraScale+ series. Trenz Electronics supplies Vivado Board Part Files for all products supported by Vivado.
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Table of contents
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Version | Vivado | SDK/Vitis | PetaLinux |
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2023.2 | AMD Vivado-2023-Known-Issues | AMD Vitis-2023-Known-Issues***** | AMD AR#000035572 |
2022.2 | AMD Vivado-2022-Known-Issues | AMD Vitis-2022-Known-Issues | AMD AR#000034483 |
2021.2***,**** | AMD AR#76539 | AMD AR#76498 | AMD AR#000032521 |
2020.2 | AMD AR#75186 | AMD AR#73646 | AMD AR#75775 |
2019.2** | AMD AR#72162 | AMD AR#72773 | AMD AR#72950 |
2018.3** | AMD AR#71653 | ||
2018.2** | AMD AR#71201 | ||
2017.4** | AMD AR#69697 | AMD AR#70277 | |
2017.3*,** | AMD AR#69952 | ||
2017.2* | AMD AR#69372 | ||
2017.1* | AMD AR#69074 | ||
2016.4 | AMD AR#66830 | AMD AR#68370 | |
2016.2 | AMD AR#66830 | AMD AR#66230 | AMD AR#67409 |
Note: * AR# 69908: 2017.1...3 - Vivado does not launch with Windows 10 Fall Creators Update
** AR#70146: QSPI flash programming now requires that you specify an FSBL, AR#70548: Zynq-7000 - QSPI programming in QSPI-boot mode -Trenz Electronic will provide special FSBL on 2017.4 an newer reference design.
*** Incompatibility of board files for ZynqMP with eMMC activated between 2021.2 and 2021.2.1 patch, see AMD Forum Request
**** Since 2021.2, AMD add Versal to Vivado as default installation. In case Versal is not used, Vivado installation size can be reduced around 40GB, when this folder will be deleted: C:\xilinx\Vivado\2021.2\data\parts\xilinx\devint\vault
***** With 2023.2 AMD changed Vitis to Vitis Unified IDE and renamed older IDE to Vitis Classic IDE. The Vitis Classic IDE will still be delivered with 23.2 but will probably be discontinued in the longer term.
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Device | AMD Link | Note |
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UltraScale+ Zynq | AR#64375 | AMD Zynq UltraScale+ MPSoC Solution Center |
Zynq-7000 | AR#52512 | AMD Zynq-7000 SoC Solution Center |
7 Series | AR#46370 | AMD 7 Series FPGA Solution Center |
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Devices | Name | DOC ID | Description |
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All | Vivado Design Suite User Guide: Programming and Debugging | UG908 | Documents Vivado® tools for programming and debugging a AMD® FPGA design. Programming the FPGA includes generating a bitstream file from the implemented design and downloading the file to the target device. Also describes how to debug a design including RTL simulation and in-system debugging.
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Zynq, Artix, Kintex, Virtex | Vivado Design Suite Tutorial: Embedded Processor Hardware Design | UG940 | Demonstrates building a Zynq®-7000 All Programmable SoC processor-based design and a Microblaze™ processor design in the Vivado® tools. Uses the Vivado IP integrator to build a design and then debug the design with the AMD® Software Development Kit (SDK) and the Vivado logic analyzer.
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ZynqMP | Zynq UltraScale+ MPSoC: Embedded Design Tutorial | UG1209 | Demonstrates building a Zynq UltraScale+ MPSoC processor-based embedded design using Vivado® Design Suite and the AMD® Software Development Kit. Provides a hands-on tutorial for effective embedded system design.
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A selection of AMD Answer Records are available on AMD Answer Record