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Template Revision 12.0 8 - on construction

Design Name always "TE Series Name" + Design name, for example "TEI0001 TE0720 Test Board"


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NIOS II Design with SDRAM Controller controller, flash memory test and 5 different LED sequences, that can be toggled using the user button.

Refer to http://trenz.org/max1000-info for the current online version of this manual and other available documentation.

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Notes :

  • Add basic key futures, which can be tested with the design


Excerpt
  • Quartus 18Prime Lite 19.1
  • NIOS II
  • SPI
  • UART
  • User Flash memory
  • SDRAM memory
  • 3-axis Accelerometer
  • User LEDs
  • User buttons

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titleDesign Revision History

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DateQuartusProject BuiltAuthorsDescription
2019
2020-
11
05-
11
12
18
19.1 Lite

TEI0001-test_board_noprebuilt-quartus_

18

19.1.0-

20191111104201

20200512095852.zip

TEI0001-test_board-quartus_

18

19.1.0-

20191111104348

20200512100037.zip

Thomas Dück
add bash files for
  • 19.1 update
2019-11-1118.1

TEI0001-test_board_noprebuilt-quartus_18.1-20191111104201.zip

TEI0001-test_board-quartus_18.1-20191111104348.zip

Thomas Dück
  • add bash files for Linux OS
2019-10-2818.1

TEI0001-test_board_noprebuilt-quartus_18.1-20191028120819.zip

TEI0001-test_board-quartus_18.1-20191028120521.zip

Thomas Dück
  • create project with TE scripts
  • new assembly variants
2019-04-0218.1TEI0001-03-08-C8-test_board-quartus_18.1-20190402.zipThomas Dück
  • initial release


Release Notes and Know Issues

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titleSoftware

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SoftwareVersionNote
Quartus Prime Lite1819.1needed
NIOS II SBT for Eclipse18.1neededeclipse---optional


Hardware

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Notes :

  • list of software which was used to generate the design

Complete List is available on <design_name>/board_files/*_devices.csv

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titleHardware Modules

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Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashOthersNotes
TEI0001-03-08-C808_C8_8MBREV02, REV038 MByte8MByte64 MBit64MBitNANA
TEI0001-03-16-C816_C8_8MBREV02, REV038 MByte8MByte64 MBit64MBitNA

NA

TEI0001-03-16-C8A16_C8A_32MBREV0332 MByte32MByte64 MBit64MBitNANA
TEI0001-03-16-C8P16_C8P_8MBREV038 MByte8MByte64 MBit64MBitNANA


Design supports following carriers:

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Additional HardwareNotes
USB Cable cable for JTAG/UARTCheck Carrier Board and Programmer for correct type


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titleDesign sources

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TypeLocationNotes
Quartus<design_name>/source_files/quartusQuartus Project project will be generated by TE Scripts
Software<design_name>/source_files/softwareAdditional Software software will be generated by TE Scripts


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titlePrebuilt files (only on ZIP with prebuilt content)

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File

File-Extension

Description

SOPC Information File*.sopcinfoFile with description of the *.qsys file to create software for the target hardware
Programmer Object File*.pofFPGA Configuration Fileconfiguration file
Diverse Reports---Report files in different formats
Software - Application - File*.elfSoftware Application application for NIOS II processor system


Download

Reference Design design is only usable with the specified Quartus version. Do never use different Versions versions of Quartus Software software for the same Projectproject.

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Reference Design is available on:

Design Flow

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Notes :
  • Basic Design Steps

  • Add/ Remove project specific description

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The Trenz Electronic FPGA Reference Designs are TCL-script based projects. Command files for execution will be generated with "_create_win_setupTo create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_createproject_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel  Intel Quartus/SDK GUI.

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For currently Scripts limitations on Win and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality

  1. Open create_project_win.cmd/create_project_linux.sh:
    'Create Project' GUI exampleImage Added
  2. Select Board in "Board selection"
  3. Click on "Create project" button to create project
    1. (optional for manual changes) Select correct device and Quartus install path on "design_basic_settings.cmd"/ "quartus installation path in "<design_name>/settings/design_basic_settings.sh" and create Quartus project with "quartus_create_project_batchmode.cmd"/"quartus_create_project_batchmode.sh"

Launch

Programming

JTAG

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    1. tcl"

Launch

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Note:

  • Programming and Startup procedure

Programming

Note

Check Module and Carrier TRMs for proper HW configuration before you try any design.

MAX10 Flash

  1. Connect the Module to USB-Port
  2. Open Quartus project with "quartus_open_existing_project_guimodecreate_project_win.cmd"/ "quartus_open_existing_create_project_guimodelinux.sh"
  3. Open the Quartus Prime Programmer from Tools → Programmer
  4. If the Arrow-USB-Blaster is not visible:
    1. Click "Hardware Setup..."
    2. Choose at the drop-down menu "Currently selected hardware" Arrow-USB-Blaster [USB0]
    3. Close "Hardware Setup"
  5. If the correct configuration file is not set:
    1. Delete other files
    2. Click "Add file..."
    3. Select the correct .pof file (created project file: <design_name>/quartus/output_files/test_board.pof or prebuilt file: <design_name>/prebuilt/<board_part_short_name>/programming_files/*.pof)
  6. Click "Start"
  7. Select correct board in "Board selection"
  8. Click on "Program device" button
    1. if prebuilt files are available: select "Program prebuilt file"
    2. using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
    3. (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
  9. Click on "Start program device" button

JTAG

Not used on this example.

Usage

  1. Prepare Hardware like described on section Programming
  2. Connect UART USB (most cases same as JTAG)

UART

  1. Open Serial Console "PuTTY"Change settings in category "Session"
  2. Connection Type: Serial
  3. COM Port: Win OS → (e.g. PuTTY)
    1. COM Port: Win OS see device manager, Linux OS → OS see  dmesg | grep ttytty  (UART is *USB1)
    2. Speed: 115200
  4. Select "Implicit CR in every LF" in category "Terminal"
  5. Click Open
  6. Press reset button at module
    1. Flash test is running
    After test finished, you can toggle between following LED sequences by pressing on the module
  7. Toggle between following modes by pressing user button
    1. Spirit level
    2. Winbond SPI flash memory test
    3. Shift register sequence
    4. Case statement sequence
    5. Shift register sequence
    6. Knightrider sequence
    7. Pulse-width modulation sequenceKnightrider sequence
    8. Case statement sequence

System Design - Quartus

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Note:

  • Description of Block Design, Constrains... BD Pictures from Export...

Block Design

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Block Design - test_board.bdfImage Added


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Block Design - NIOS_test_board.qsysImage Added

Software Design - SDK

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Note:
  • optional chapter separate

  • sections for different apps

Application

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Template location: <design_name>/source_files/software/

test_board

Software example to test TEI0001 module.

Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision  revision got to "Change History"   of this page and select older document revision number.

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DateDocument Revision

Authors

Description

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  • 19.1 release
2019-11-11v.8Thomas Dück
  • add bash files for Linux OS
2019-10-29v.6Thomas Dück
  • change design to TE scripts
  • new variants
2019-04-03v.4Thomas Dück
  • Initial release 18.1
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