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TE0320 has a flexible SPI bus on-board as outlined in Figure 29.

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Figure 29: SPI bus topology.
SPI signals on the TE0320 are listed and described in Table 7.

name	definition	description
SPI_Q	serial data output	This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of SPI_/C.
SPI_D	serial data input	This input signal is used to transfer data serially into the device. It receives instructions, addresses, and the data to be programmed. Values are latched on the rising edge of SPI_/C
SPI_/C	serial clock	This input signal provides the timing of the serial interface. Instructions, addresses, or data present at SPI_D are latched on the rising edge of SPI_/C. Data on SPI_Q changes after the falling edge of SPI_/C.
SPI_/S	chip select	When this input signal is high, the device is disabled and SPI_Q is at high impedance (Z).
		When this input signal is low, the device is enabled.
		After power-up, a falling edge on SPI_/S is required prior to the start of any instruction to the Flash memory.

Table 7: SPI signals summary.
SPI signal pin-out of the TE0320 is summarized in Table 8.

Table 8: SPI pin-out summary.

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