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TE0300 is provided with a slide switch S3.
Slide switch S3 conditions the value of signal PS_EN.
In this way, S3 conditionally/unconditionally enables the power rails 1.2 V and 2.5 V power rails.
Note. DNP: Do Not Populate aka Do Not Solder the Component associated to DNP label.
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When S3 is turned on (closed, FX2 PON), the 1power rails 1.2 V and 2.5 V power rails are controlled by the USB (EZ-USB FX2LP USB FX2) microcontroller. At start-up, the USB microcontroller switches off the power rails 1.2 V and 2.5 V power rails and starts up the module in low-power mode. After enumeration, the USB microcontroller firmware switches on the power rails 1.2 V and 2.5 V power rails on, if enough current is available from the USB bus.
When S3 is turned off (open, PON), the 1power rails 1.2 V and 2.5 V power rails are always enabled.
 | When S3 is turned on (FX2 PON), make sure that no signals are applied to the input pins when power-rails are disabled by the USB microcontroller (at start-up). |
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Port D Pin | Alternate Function | Alternate Function is Selected By... | Alternate Function is Described in... |
|---|---|---|---|
| PD.7:0 | FD[15:8] | IFCFG1 = 1 and any WORDWIIDE bit = 1 | Slave FIFOs chapter 9 on page 99 |
Table from EZ-USB(R) Technical Reference Manual (EZ-USB_TRM.pdf).
Signal PS_EN
- Signal PS_EN enables (1) or disables (0) power rails 1.2 V and 2.5 V power rails.
Figure 36: P ower Power rails 1.2 V and 2.5 V could be enabled/disabled by signal PS_EN. Power-rail 3.3V is not controlled by signal PS_EN and is unconditionally enabled.
Figure 37: Power rail 3.3V could not be enabled/disabled by signal PS_EN.
The power-rail 3.3 V though is out of the control of the USB-microcontroller and is supplied down-converting the power supply 5 V power supply provided by either the USB-bus or the B2B receptacle connector. In this case, signals that are applied to the 3.3 V I/O banks do not need to be disconnected when power-rails are disabled by the USB microcontroller.
VCCIO0 assembly options
According to the corresponding assembly option, power rail VCCCIO0 can depend or not on the power rail 2.5V.
Voltage VccIO for bank B0 shall span from 1.2 V to 3.3 V. VccIO can be supplied either externally or internally to the micromodule.
| Warning! Spartan-3 I/Os are not 5 V tolerant. Applying more than the recommended operating voltages at any pin, results in a damaged FPGA (see Xilinx Answer AR#19146). |
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Externally Supplied VCCIO
VccIO can be externally supplied over the B2B connector J4. If bank B0 is not used, then VccIO can be left open.
Internally Supplied VCCIO
If VccIO is not externally supplied, it can be internally supplied by one of the internal power rails of 2.5 V and 3.3 V. This is possible by short-circuiting one of the two pad pairs placed on the right of connector J4 at the top right corner of the bottom side of the micromodule.
Two suitable ways of shirt-circuiting the paid pair are by means of a zero-ohm 0603 (1608 metric) chip resistor or a solder blob.
Figure 37: example of VCCIO0 assembly. The soldering of R102 and R103 are mutually exclusive.
Figure 9 shows how to short-circuit VccIO to internal 3.3 V power rail. FX2_PS_EN does not control VCCCIO0 (3.3V) FPGA bank 0
Figure 10 shows how to short-circuit VccIO to internal 2.5 V power rail. FX2_PS_EN does control VCCCIO0 (2.5V) FPGA bank 0
Slide Switch S3 = FX2 PON
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Full power operation (PS_EN = 1): when slide switch S3 is in the right position (PON = power rails unconditionally on), signal PS_EN is set to power rail 3.3V. Thus power rails 1.2 V and 2.5V and 1.2V are unconditionally enabled.
Figure 39: S3 on position PON (PS_EN ≠ FX2_PS_EN = x; PS_EN = high ).
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