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1. C:\XilinxProject, if you have copied the folder "TE0xxx-Reference-Designs\reference-TE0xxx" to "C:\XilinxProject" ( "C:\XilinxProject\reference-TE0xxx" and "C:\XilinxProject\TE-EDK-IP"),
2. otherwise you must copy the contents of GitHub's 'TE-EDK-IP' folder inside the already existent empty folder "TE0xxx-Reference-Designs\TE-EDK-IP".

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click set_xxxx_project.bat to select your xxxx FPGA mounted on TE module;
double click the system.xmp;
the Xilinx Platform Studio should open
you should click "Project" and then click "Project Options";
under "Advanced Options (Optional) > Project Peripheral Repository Search Path" you must write (if it is not already written) "..TE-EDK-IP\"
GIALLO: you should not alter folder nesting or select MyProcessorIPLib because double nesting of folders is a Xilinx Platform Studio requirements
after this selection the XPS should appear like in this image.
now you can cancel (or move in another folder) the content of TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Export
now you can copy all .c and .h file from TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Workspace\demo\src in a temporary folder (C:\demo_src_TE for example)
now you can cancel all files and folders from TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Workspace
to compile the project you must click "Project" and then "Export Hardware Design to SDK..."
The HW implementation usually takes some time; if you have a very slow computer, the new synthesis could require an hour.

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