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Preloaded FPGA Bitstream (FPGA image, SPI Flash)

TE0320 comes with SPI Flash preloaded with a reference design?

Those preloaded image is just for getting started demo, for real designs:

•     it is expected that these image could be replaced by the customer;
•     it is expected that these image could be used by the customer as starting point.

Preloaded USB Firmware (FX2 USB microcontroller, EEPROM)

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The modules shipped before 2/09/2013 comes with Generation 2 firmware. [PCN content replication, please remove]

The modules shipped after 2/09/2013 comes with Generation 3 firmware. [PCN content replication, please remove]

To change the firmware of EEPROM from generation 2 to Generation 3 you must follow this procedure. You may also watch this video play list. [content replication, link to original]

Those preloaded firmware is used with TE API ... .

Preloaded FPGA Bitstream (FPGA image, SPI Flash)

TE0320 comes with SPI Flash preloaded with a reference design?

Those preloaded image is just for getting started demo, for real designs:

•     it is expected that these image could be replaced by the customer;
•     it is expected that these image could be used by the customer as starting point.

[content replication, link to original]

Custom FPGA design

We recommend to download and install the standard Xilinx development tool for the synthesis and implementation of custom logic (FPGA) design.

Custom USB design

???

Generating bitstreams

•     BIT

•     MCS

Loading FPGA Bitstream through JTAG

Xilinx Impact can be used to load bitstreams.

Loading FPGA Bitstream through USB

Xilinx Impact can be used to load bitstreams.

Loading the Reference Design into FPGA

...

Loading a Custom Design into FPGA

...

Loading USB Firmware through

...

USB

Cypress tools (....) or Trenz Electronic Tools (...) can be used to load FX2 USB microcontroller's firmware.

Loading FPGA Bitstream with JTAG

Xilinx Impact can be used to load bitstreams.

Loading FPGA Bitstream with USB

Xilinx Impact can be used to load bitstreams.

Generating bitstreams

•     BIT
•     MCS

Loading FPGA with Reference Design

Loading FPGA with Custom Design