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Warning
If you don't also write the IIC EEPROM (Lg EEPROM for CyConsole and xxx for CyControl), the new firmware is lost if the USB FX2 module goes under reset or power off/on cycle).

IIC EEPROM Configuration (EEPROM Firmware)

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Warning

The firmware actually changes (it runs on USB FX2 microcontroller's RAM) only when

  • you reset the USB FX2 module;
  • you power off and power on the USB FX2 module;
  • you write the USB FX2 microcontroller's RAM (RAM for CyConsole and xxx for CyControl), the new firmware is lost if the USB FX2 module goes under reset or power off/on cycle).

FPGA Configuration (bitstream image, RAM-like)

Warning
If you don't also write the SPI Flash memory, the new bitstream image is lost if the USB FX2 module goes under reset or power off/on cycle.

The Xilinx Spartan-3E FPGA on the TE0300, Xilinx Spartan-3A DSP FPGA on the TE0320, Xilinx Spartan-6 FPGA on the TE0630 can be configured in the following ways:

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  • Xilinx Spartan-3E FPGA
  • Xilinx Spartan-3A DSP configuration modes, please consult the documentation listed in chapter 17 Related Materials and References.
  • Xilinx Spartan-6

SPI Flash Configuration (

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bitstream image, PROM)

Tip
If the USB FX2 module exit from reset state or is powered on (in the default state of switches), the SPI Flash content program/configure the FPGA

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The bit-stream for the FPGA is stored in the SPI Flash. To use this bit-stream source FPGA configuration option is set to “Master Serial/SPI”. See 2.8 SPI Flash for additional information.

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