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  1. disable the master reset S1D (do not care about all other switches at write time);
  2. connect the Xilinx platform cable to JTAG connector J2 as described in paragraph JTAG connector J2;
  3. generate or locate the FPGA bitstream file you want to store on the memory;
  4. prepare an SPI PROM file using the ISE iMPACT graphical software from the FPGA bitstream file;
  5. use the ISE iMPACT graphical software to in-system program the SPI PROM.

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