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- B2B connector
- JTAG
- Slave Parallel (SelectMAP)
- Slave Parallel
- 6-pin JTAG header connector
- 6-pin SPI header connector (TE0300 only)
- USB connector (in fact, SPI Flash memory is used: OpenFutNet or another softwares writes the bitstream image in the SPI Flash and, after SPI Flash writing is complete, the FPGA read the SPI Flash content to configure itself)
SPI Flash memory (see the next section)
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The bit-stream for the FPGA is stored in the SPI Flash. To use this bit-stream source FPGA configuration option is set to “Master Serial/SPI”. See SPI Flash Bus links for additional information for every case.
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Direct programming via USB controller; it is usually done by Firmware Upgrade Tools like Python OpenFut and C# OpenFutNet.
Indirect SPI programming via FPGA pins; it is done by Xilinx iMPACT via JTAG. See Appendix A. Indirect SPI Programming using iMPACT.
Direct SPI programming via FPGA pins; the FPGA project should contain SPI interface core and the software to work with it (SPI interface and SW required are automatically created by Xilinx iMPACT tool). Only if Xilinx iMPACT tool is version 11.x or below, see Xilinx AR#36156.
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Overview
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