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Scroll pdf title
titleDip switch S1[A:D aka 1:4]. The switch S1B is the one with label 2 and B

 

 

 

Scroll pdf title
titleDip switch S1B schematic.

 

 

 

 

 

Scroll pdf title
titleWhen Dip switch S1B = FX2 PON, signal PS_EN is set to signal FX2_PS_EN driven by the EZ-USB FX2LP USB FX2 microcontroller under user control.

 When S1B is turned off (open) (FX2 PON position), the 1.2 V, 1.5 V and 2.5 V power rails are controlled by the USB (EZ-USB FX2LP USB FX2) microcontroller. At start-up, the USB microcontroller switches off the power rails 1.2 V, 1.5 V and 2.5 V and starts up the module in low-power mode. After enumeration, the USB microcontroller firmware enables (switches on) the power rails 1.2 V, 1.5 V and 2.5 V, if enough current is available from the USB bus.

...

 

Scroll pdf title
titleTable from EZ-USB(R) Technical Reference Manual (EZ-USB_TRM.pdf).
Port D Pin
Alternate
Function
Alternate Function
is Selected By...
Alternate Function
is Described in...
PD[7:0]FD[15:8]

IFCFG1 = 1 and

any WORDWIIDE bit = 1
Slave FIFOs chapter 9 on page 99


Signal PS_EN

  • Signal PS_EN enables (1) or disables (0) power rails 1.2 V, 1.5 V and 2.5 V.

    Scroll pdf title
    titlePower rails 1.2 V, 1.5 V and 2.5 V could be enabled/disabled by signal PS_EN.


  • Power-rail 3.3V is not controlled by signal PS_EN and is unconditionally enabled. 

    Scroll pdf title
    titlePower rails 3.3V could not be enabled/disabled by signal PS_EN.

     

VCCIO assembly options

 According to the corresponding assembly option, power rail VCCCIO0 can depend or not on the power rail 2.5V.

VCCIO0 voltage can be configured in 3 ways:

  • 2.5V - When resistor R103 is populated and resistor R102 is not populated.
  • 3.3V - When R103 is not populated and resistor R102 is populated.
  • 1.2 V ÷ 3.3 V (External supply) - When R103 is not populated and R102 is not populated. In this case external supply source have to be connected to pins 1, 2, 3, 4 of J4 B2B connector(1).

 (1) See Spartan-6 documentation fo VCCIO power range.

Scroll pdf title
titleExample of VCCIO0 assembly not dependent on 2.5V power rail. The other way is also possible.

 

Image Removed
Warning
Others options of VCCIO0 power supply are not supported and can damage the FPGA!

See the figure below to locate R102 and R103 on PCB.

Scroll pdf title
titleThis figure locates R102 and R103 on PCB.

Dip Switch S1B = FX2 PON 

...

Full power operation (PS_EN = 1): when Dip switch S1B is in the right position (PON = power rails unconditionally on), signal PS_EN is set to power rail 3.3V. Thus power rails 1.2 V, 1.5 V and 2.5 V are unconditionally enabled.

Scroll pdf title
titleS1B on position PON (PS_EN ≠ FX2_PS_EN = x; PS_EN = high ).

 
 
 

Summary table

The table below summarizes all switching options implied by Dip switch S1B and firmware signal FX2_PS_EN (under the standard assembly option). 

Scroll pdf title
titleDip switch S1B settings overview ( 1.2 V, 1.5 V , 2.5 V, VCCIO0).

power rail

S1B= PON
(PS_EN = 1)
(PS_EN ≠ FX2_PS_EN)
(Full power)

S1B = FX2 PON and
PS_EN = FX2_PS_EN = 1

(Dynamic full power)

S1B = FX2 PON and
PS_EN = FX2_PS_EN = 0

(Dynamic low power)

1.2 V

on

on

off

1.5 Vononoff

2.5 V

on

on

off

VCCCIO0 (= 2.5 V)
R102-R103+ assembly (1)

on

on

off

VCCCIO0 (= 3.3 V)
R102+R103- assembly (2)

on

on

on

(1) R102 unpopulated / R103 populated

(2) R102 populated / R103 unpopulated