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| Warning |
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Direct SPI configuration is supported only up to Xilinx iMPACT version 11.x. See Xilinx AR#36156. |
DIP
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Switches Configuration
Similar to the traditional configuration memories, SPI serial Flash memories must be loaded with the configuration data. SPI serial Flash memories have a single interface for programming, but there are multiple methods to deliver the data to this interface. This section discusses the hardware setup, the PROM file generation flow and the software flow for ISP (indirect in-system programming) of a Trenz Electronic TE0300 SPI serial Flash configuration PROM through the JTAG interface of a Xilinx Spartan-3E FPGA using Xilinx iMPACT 10.1 (with other version the procedure should be almost the same).
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- Connect the host computer to the micromodule through both the SPI flying leads cable and the USB cable.
- Start Xilinx ISE iMPACT and follow this procedure for the creation of .mcs file and this procedure for the SPI Indirect ISP.
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| When downloading via parallel JTAG programmer to FPGA, it can happen that programming fails with Error: "'1' : Programming terminated. DONE did not go high." Try setting DIP switch S4 to JTAG-only. A bug in certain Xilinx iMPACT versions can cause this. |
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