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You can also use OpenFutNet: if used for Firwmare Recovery Boot or Firmware Upgade both EEPROM and RAM are programmed.

Warningnote
If you don't also write the IIC EEPROM ("Options" > "EZ-USB Interface" > "Lg EEPROM" for CyConsole and "Program>FX2 64KB EEPROM" for CyControl), the new firmware is lost if the TE USB FX2 module goes under reset or power off/on cycle.

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You can also use OpenFutNet: if used for Firwmare Recovery Boot or Firmware Upgade both EEPROM and RAM are programmed.

Warningnote

The firmware actually changes (it runs on USB FX2 microcontroller's RAM) only when

you reset the TE USB FX2 module;
you power off and power on the TE USB FX2 module;
you write the USB FX2 microcontroller's RAM (but the new firmware is lost if the TE USB FX2 module goes under reset or power off/on cycle).

FPGA Configuration (bitstream, RAM-like image)

Warningnote
If you don't also write the SPI Flash memory, the new bitstream image is lost if the TE USB FX2 module goes under reset or power off/on cycle.

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B2B connector
- JTAG
- Slave Parallel (SelectMAP)
- Slave Parallel
6-pin JTAG header connector
6-pin SPI header connector (TE0300 only)
USB connector (in fact, SPI Flash memory is used: OpenFutNet or another softwares writes the bitstream image in the SPI Flash and, after SPI Flash writing is complete, the FPGA read the SPI Flash content to configure itself)
SPI Flash memory (see the next section)

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