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For your convenience, a reference video is available on the TrenzElectronic's Channel at YouTube.
For further reference, please read Xilinx XAPP974: Indirect Programming of SPI Serial Flash PROMs with Spartan-3A FPGAs and this discussion (in particular for TE0630 Spartan 6 module) on the Xilinx forum.

DIP Switches configuration

Similar to the traditional configuration memories, SPI serial Flash memories must be loaded with the configuration data. SPI serial Flash memories have a single interface for programming, but there are multiple methods to deliver the data to this interface. This section discusses the hardware setup, the PROM file generation flow and the software flow for ISP (indirect in-system programming) of a Trenz Electronic TE0320 SPI serial Flash configuration PROM through the JTAG interface of a Xilinx Spartan-3A DSP FPGA using Xilinx iMPACT 11.5 (with other version the procedure should be almost the same).
To write the SPI Flash memory, perform the following steps:

...

In order to have the module to configure from its SPI Flash memory next time it is (re)booted, ensure one of following DIP switch settings:

 For your convenience, a reference video is available on the TrenzElectronic's Channel at YouTube.
For further reference, please read Xilinx XAPP974: Indirect Programming of SPI Serial Flash PROMs with Spartan-3A FPGAs and this discussion (in particular for TE0630 Spartan 6 module) on the Xilinx forum.