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Both USB connection and JTAG connection could be used to downolad the FPGA bitstream on the SPI Flash (write the SPI Flash content).

JTAG connection could also be used to directly downolad the FPGA bitstream on the FPGA without the need of a reset.

Only through the JTAG interface connection it is possible to use Xilinx EDK and SDK for develop and debug phases, using EDK/SDK GUI and XMD console.

USB connection could not be used with Xilinx EDK and SDK for develop and debug. USB connection should be used when develop and debug phases ended.

It is possible to use Xilinx EDK/SDK  and Impact (or equivalent console XMD commands) to develop an a FPGA bitstream (with MicroBlaze's SW "fused" in a FPGA bitstream) and program the TE USB FX2 module without use of a JTAG connection.

With the use of a JTAG connection the develop and debug phases are easier; without the JTAG connection, the user/developer should create/use custom functions/programs for the debug phase and some JTAG debug feature may not be easily replicated with the use of a USB connection.