Introduction
The reference architecture can be tested in two ways:
Two types of connection are available:
...
title | JTAG vs USB connection |
---|
...
Xilinx EDK/SDK and Impact (or equivalent console XMD commands) could be used to develop a FPGA bitstream (with MicroBlaze's SW "fused" in a FPGA bitstream). When the FPGA bitstream is ready, either USB connecion or JTAG connection could be used to write TE USB FX2 module's SPI Flash (downolad the FPGA bitstream
...
in the SPI Flash
...
).
JTAG connection could also be used to directly downolad the FPGA bitstream on the FPGA without the need of a reset.
...
JTAG
...
connection could
...
be used with Xilinx EDK and SDK GUIs for
...
development and debug
...
phases; XMD console couls also be used.
It is possible to use Xilinx EDK/SDK and Impact (or equivalent console XMD commands) to develop a FPGA bitstream (with MicroBlaze's SW "fused" in a FPGA bitstream) and program the TE USB FX2 module without use of a JTAG connection.
With the use of a JTAG connection, the
...
development and debug phases are easier; without the JTAG connection, the user/developer should create/use custom functions/programs for the debug phase and some JTAG debug feature may not be easily replicated with the use of a USB connection.
USB connection could not be used with Xilinx EDK and SDK GUIs for development and debug phases. USB connection should be used after the end of development and debug phases.
Anchor | ||||
---|---|---|---|---|
|
...