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Xilinx EDK/SDK and Impact (or equivalent console XMD commands) could be used to develop an FPGA bitstream (with MicroBlaze's SW "merged" in into a FPGA bitstream). When the FPGA bitstream is ready, either USB connecion or JTAG connection could be used to write TE USB FX2 module's SPI Flash (downolad the FPGA bitstream in the SPI Flash).

The JTAG connection could also be used to directly downolad the FPGA bitstream on the FPGA without the need of a reset.

The JTAG connection could be used with Xilinx EDK and SDK GUIs for development and debug phases; XMD console couls also be used.

The USB connection could NOT be used with Xilinx EDK and SDK GUIs for development and debug phases. USB connection should be used after the end of development and debug phases.

With the use of a the JTAG connection, the development and debug phases are easier; without the use of JTAG connection, the user/developer should create/use custom functions/programs for the debug phase and some JTAG debug feature may not be easily replicated with the use of a USB connection.

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