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- FPGA users signals;
- USB signals;
- Power signals;
- System reset signals.
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For the schematic connection between TE0630 module's J(M)4/J(M)5 and TE0303 Prototyping Carrier Board's connections J1/J2/J3/J4, the user should see this link. TE0300 module and TE0630 module connect to the same TE0303 Prototyping Carrier Board. |
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For the schematic connection between TE0300 module's J(M)4/J(M)5 and TE0304 Application Demo Carrier Board's connections, the user should see this link. TE0300 module and TE0630 module connect to the same TE0304 Application Demo Carrier Board. |
Pin Labelling
FPGA user signals connected to B2B connectors are characterized by the "Vx_IO_yy_p" naming convention, where:
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Overview
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