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| Scroll Title |
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| anchor | Table_OBP_RTCADC |
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| title | I2C ADC interface MIOs PL and pins |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| MIO Pin | Schematic | U? Pin | Notes |
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Clock Sources
| Scroll Title |
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| anchor | Table_OBP_I2C_RTCCLK |
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| title | I2C Address for RTCOscillators |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| MIO Pin | I2C Address | Designator | Notes |
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Ethernet
| Scroll Title |
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| anchor | Table_OBP_CLKETH |
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| title | OscillatorsEthernet PHY to Zynq SoC connections |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Designator | Description | Frequency | Note |
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MHz | MHz | KHz |
Ethernet
| U?? Pin | Signal Name | Connected to | Signal Description | Note |
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USB 2.0 ULPI transceiver
| Scroll Title |
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| anchor | Table_OBP_ETHUSB |
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| title | Ethernet USB PHY to Zynq SoC connections |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| U?? Pin | Signal Name | Connected to | Signal Description | Note |
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LEDs
FTDI USB 2.0 to UART/JTAG
The TE0716 board is equipped with the FTDI FT2232H USB 2.0 to JTAG/UART adapter controller connected to the MicroUSB 2.0 B connector J13 to provide JTAG and UART access to the attached module.
There is also a 4Kbit configuration EEPROM U40 (M93C66) wired to the FT2232H chip via Microwire bus which holds pre-programmed license code to support Xilinx programming tools. Refer to the FTDI datasheet to get information about the capacity of the FT2232H chip.
Do not access the FT2232H EEPROM using FTDI programming tools. By doing it, you could erase normally invisible user EEPROM content and invalidate stored Xilinx JTAG license. Without this license, the on-board JTAG will not be accessible any more with any Xilinx tools. Software tools from FTDI website do not warn or ask for confirmation before erasing user EEPROM content.
Channel A of the FTDI chip is configured as JTAG interface connected to the BANK 0 Zynq SoC.
Channel B can be used as UART interface routed to the 2-Bit Bus Switch, which routes to the BANK 500 Zynq SoC, when the Output of the Bus Switch is Enable, and is available for other user-specific purposes.
| Scroll Title |
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| anchor | Table_OBP_FTDI |
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| title | USB FTDI to Zynq SoC connections |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| U?? Pin | Signal Name | Connected to | Signal Description | Note |
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LEDs
| Scroll Title |
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| anchor | Table_OBP_LED |
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| title | On-board LEDs |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Designator | Color | Connected to | Active Level | Note |
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Switches
| Scroll Title |
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| anchor | Table_OBP_LED |
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| title | On-board LEDs |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Designator | Connected to | Active Level | Function | Note |
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Power and Power-On Sequence
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