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| Scroll Title |
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| anchor | Figure_OV_BD |
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| title | TE0716-01 block diagram |
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| Scroll Ignore |
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| draw.io Diagram |
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| border | false |
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| diagramName | DB-TE0716-01 |
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| simpleViewer | false |
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| width | |
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| links | auto |
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| tbstyle | hidden |
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| diagramDisplayName | |
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| lbox | true |
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| diagramWidth | 641 |
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| revision | 1819 |
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| Scroll Only |
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Main Components
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| Scroll Title |
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| anchor | Figure_PWR_PD |
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| title | Power Distribution |
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| Scroll Ignore |
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| draw.io Diagram |
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| border | false |
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| diagramName | PWR-PD-TE0716-01 |
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| simpleViewer | false |
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| width | |
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| links | auto |
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| tbstyle | hidden |
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| diagramDisplayName | |
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| lbox | true |
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| diagramWidth | 643 |
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| revision | 2 |
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| Scroll Only |
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Power-On Sequence
The TE0716 has only one common "PGOOD" signal (from U37, U43, U45 and U46), and there is no Enable for the board. You could control the startup of the board IC, by controlling the +5.0V and the +5.0V_VAA input signals only.
| Scroll Title |
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| anchor | Figure_PWR_PS |
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| title | Power Sequency |
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| Scroll Ignore |
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| draw.io Diagram |
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| border | true |
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| |
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| diagramName | PWR-PS-TE0716-01 |
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| simpleViewer | false |
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| width | |
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| links | auto |
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| tbstyle | top |
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| lbox | true |
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| diagramWidth | 641 |
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| revision | 3 |
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| Scroll Only |
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Voltage Monitor Circuit
The TE0716 has also a Voltage Monitor IC. It keeps nRST signal low if the FPGA core voltage (+1.0V) drops under 0.84V or the 3.3V power supply drops to 2.94V or less.
Power Good signal is unique and comes from the power supplies IC U37, U43, U45 and U46, as you can see in the previous section "Power-On Sequence", and also could make nRST to remain low until PGOOD is high.
See also "Reset process." section in "Configuration Signals" for additional information.
| Scroll Title |
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| anchor | Figure_PWR_VMC |
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| title | Voltage Monitor Circuit |
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| Scroll Ignore |
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| draw.io Diagram |
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| border | false |
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| diagramName | PWR-PM-TE0716-01 |
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| simpleViewer | false |
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| width | |
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| links | auto |
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| tbstyle | hidden |
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| diagramDisplayName | |
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| lbox | true |
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| diagramWidth | 642641 |
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| revision | 12 |
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| Scroll Only |
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 Image Added
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Power Rails
| Scroll Title |
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| anchor | Table_PWR_PR |
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| title | Module power rails. |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Power Rail Name | B2B Connector JP1 Pin | B2B Connector JP2 Pin | Direction | Notes |
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| +5.0V | 1, 2, 3 | 1, 2, 3 | Input | Main Supply voltage from the carrier board | | +5.0V_VAA | 43, 44 | - | Input | Analog Supply voltage from the carrier board | | +3.3V (VREF_JTAG) | - | 5 | Output | JTAG reference voltage. |
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