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Type: Enhancement
Reason: JTAG pins connected to Zynq are high impedance as long as the core voltage is not available.
Impact: No Impact, improve Power sequencingNone, improved power sequencing.
#5 Boot mode pins are GND or high impedance until en_3v3_int are high
Type: Enhancement
Reason: Boot Mode pins connected to Zynq are high impedance as long as the core voltage is not available.
Impact: No Impact, improve Power sequencingNone, improved power sequencing.
#6 MIO14,15 high impedance until en_3v3_int are high
Type: Enhancement
Reason: UART pins that to Zynq connected are high impedance as long as the core voltage is not available.
Impact: No Impact, improve Power sequencingNone, improved power sequencing.
#7 JTAG time constraint
Type: Enhancement
Reason: Signal propagtion constraints to improve JTAG on high traffic
Impact: No Impact, improve JTAG connection
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