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1. manage incoming USB setup data packet (used for device registration by OS of USB host);
2. manage incoming USB data packet (this data packet should normally contains TE API Commands (FW APIs));
   
3. manage interruption (INT0 pin) incoming from FPGA chip (normally FPGA's MicroBlaze soft-processor).

Task 1 is realized implemented (carried out) by 

if(usb_setup_packet_avail()) usb_handle_setup_packet();

Task 2 is realized 2 is implemented (carried out) by

void ep1_pool(void)

Task 3 is realized implemented (carried out) by

void int_pin_pool(void)

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Manage incoming USB data packet (task2)

This process is realized process is implemented (carried out) by function ep1_pool().

This function pull 64 bytes from EP1OUTBUF FIFO; in this FIFO are stored possible TE API Commands (FW APIs) sent by host computer's SW through USB connection.

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The host computer's SW should use a polling procedure to retrieve the I2C bytes read (and stored) by FX2 microcontroller (the pull response to host computer's pull is realized pull is implemented (carried out) by task2: ep1_pool())

Pull INT pool.  Longer description true for every Logical Architecture Layer

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