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| Scroll pdf title |
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| title | Table A: SPI bus modes for configuration. |
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description | usage | EZ-USB FX2LP | FPGA | B2B J5 | serial Flash |
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EZ-USB â-º Flash | OpenFUT
API | master | off
(S3 = FX2PON,
FX2_PS_EN = 0) | deselected | slave | FPGA â—„ Flash | OpenFUT
API | inactive
SPI_* = Z | master
(SPI_/S = 1) | deselected | slave |
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The PROM file (containing the FPGA configuration bitstream) can be written to the SPI serial Flash memory (slave) also through the SPI pins of B2B connector J5 (attached device set to master mode). In this case, the FPGA shall be turned off or three-stated to release its shared SPI pins and the USB FX2 microcontroller shall three-state (Z = high impedance) its shared SPI pins.
SPI bus for operation
A plurality of usage combinations of the SPI bus during operation is made available to the user as suggested in Table B below.
| Scroll pdf title |
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| title | Table B: SPI bus modes for operation. |
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description | usage | EZ-USB FX2LP | FPGA | B2B J5 | serial Flash | EZ-USB â—„â-º Flash | custom | master | off
(S3 = FX2PON,
FX2_PS_EN = 0) | deselected | slave | FPGA â—„â-º Flash | custom | inactive
SPI_* = Z | master
(SPI_/S = 1) | deselected | slave |
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| Warning |
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| Other combinations of master and slave units are neither supported nor recommended. |