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Overview

Refer to https://wiki.trenz-electronic.de/display/PD/TE0741 for online version of this manual and the rest of available documentation.

Trenz Electronic TE0741 is an industrial-grade FPGA module integrating a Xilinx Kintex-7 FPGA, 32 MByte SPI Flash memory for configuration and operation, and powerful switching-mode power supplies for all on-board voltages. A large number of configurable I/Os is provided via rugged high-speed stacking strips.

The TE0741 module is available in four different logic densities (70T, 160T, 325T and 410T). The 70T and 160T devices can be programmed with the free Xilinx Vivado WebPACK software. Further information about the Kintex-7 FPGA can be found in the Xilinx document 7 Series FPGA's Overview (DS180)7 Series FPGA's Overview (DS180).

Refer to http://trenz.org/te0741-info for online version of this manual and the rest of available documentation.

Key Features

• Industrial-grade Xilinx Kintex-7 FPGA module (70T*, 160T*, 325T, 410T)
  * Devices supported by the free Xilinx Vivado WebPACK software.
• 256-Mbit (32-MByte) Quad SPI Flash memory (for configuration and operation) accessible through:
  • FPGA
  • JTAG port (SPI indirect (Bus width x4))
• 8 GTX transceivers
• FPGA configuration through:
  • JTAG (B2B connector)
  • SPI Flash memory
• 25 MHz low jitter oscillator with shutdown control
• Programmable quad PLL clock generator
• On-board high-efficiency DC-DC converters
  • GTX voltage regulators with control enable
  • Core voltage regulator: 20A (2 x Enpirion DC-DC regulators with load-sharing)
  • Supply voltages: either 3.3V or 3.3V and 5V
• Plug-on module with two 100-pin and one 60-pin high-speed hermaphroditic stacking strips
• Up to 144 (94 for 70T) FPGA I/O pins are available on B2B strips (up to 65 LVDS pairs possible)
• 2 user LED's, 1x DONE FPGA pin LED, 1 System Controller status LED
• System management and power sequencing
• AES bit-stream encryption
• eFUSE bit-stream encryption
• Evenly spread supply pins for good signal integrity

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Table 4: Pin-description of System Controller CPLD. Important, functionality depends on CPLD Firmware, see TE0741 CPLD. General 4x5 module controller IO description on 4 x 5 SoM Integration Guide#4x5SoMIntegrationGuide-4x5ModuleControllerIOs

On-board LEDs

There are four LED's available on TE0741 SoM. Two status LED's (D3 and D4) and two user configurable LED's (D1 and D2).

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Figure 3: Clocking block diagram. 

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To enable the voltage supply for the GTX transceivers, namely the Enpirion EP53F8QI voltage regulators U6 and U16, which serve the voltages MGTAVCC (1.0 V) and MGTAVTT (1.2 V), the signal EN_MGT (bank 14, pin H22) have to be set high. The voltage regulators will indicate "Power OK" with signals PG_MGT_1V and PG_MGT_1V2, when reaching stable state.

Figure 4: GTX transceiver block diagram.

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Green LED D4 (C_LED) connected to the System Controller CPLD is to indicate the status of the module. CPLD Firmware, see TE0741 CPLD.

Figure 5: System Controller CPLD block diagram.

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Hardware revision number is written on the PCB board together with the module model number separated by the dash.

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