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  1. Create a new IP Location.


  2. Double-click IBERT 7 series GTP (or GTX).


  3. Define the new IBERT. Set the LineRate, select the Quad count, select the Refclk and Clock Source.






  4. Generate the Core.




  5.  Open the  Right-click the IP in the Sources view, choose "Open IP Example Design".  
  6. Test

 

 

 

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  1. Image Added


  2. A new project with the IBERT example design will be created and opened.
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  3. Test

 

  

 

 

References

  1. LogiCORE IP Integrated Bit Error Ratio Tester (IBERT) for 7 Series GTP Transceivers v3.

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  1. 0 (pg133)
  2. LogiCORE IP Integrated Bit Error Ratio Tester (IBERT) for 7 Series GTX Transceivers v3.0 (pg132 )