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Table of Contents

Table of Contents

Overview

The Trenz Electronic TE0725 is a low cost small-sized FPGA module integrating a Xilinx Artix-7 (15-100T) and 32 MByte Flash memory for configuration and operation.


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Refer to 

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http://

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trenz

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org/te0725-info for 

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online version of this manual and the rest of available documentation of the product.

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Key Features

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  • Xilinx Artix-7

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Block Diagram

  • XC7A35T (A15 to A100T) 

  • Commercial Temperature Grade (Industrial on Request)

  • 32 MByte Flash Memory

  • 2 x 50 Pin Headers with 2,54mm Pitch, Ideal for Breadboard Use

  • 87 IOs (42 + 42 + 3)
  • 100 MHz System Clock
  • I2C EEPROM
  • 3.3V Single Power Supply with On-Board Voltage Regulators

  • Size 73 x 35 mm

  • JTAG/UART Connector 

  • 2 LED's

  • Optional HyperRAM (8 to 32 MByte)
  • Optional POF Fiber Optical Adapter (125/250 Mbps)

Block Diagram

draw.io Diagram
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diagramNameTE0725-04_updated
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Main Components

Note that on the images below, that there is no POF transceiver, no 50-pin headers and no JTAG/UART header installed.

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  1. Xilinx Artix-7 FPGA, U1
  2. 32-MByte Flash Memorymemory, U7
  3. Enpirion EN6347 4A PowerSoC DC-DC Step Down Converterstep down converter, U10
  4. Enpirion EN5311 1A PowerSoC Synchronous Buck Regulator With Integrated Inductorsynchronous buck regulator with integrated inductor, U11
  5. POF Transceiver transceiver placeholder, U8
  6. 50-pin placeholder for breadboard connector, J1
  7. 50-pin placeholder for breadboard connector, J2
  8. JTAG/UART connector, JB1
  9. Green LED D2(SYSLED) and Red red LED D3(DONE)
  10. 16K x 8 (128-Kbit) Serial serial EEPROM, U2
  11. Low-Noisenoise, High high PSRR, RF, 200-mA Low-Dropout Linear Regulatorlow-dropout linear regulator, U9
  12. Ultralow Supply-Current Voltage Monitor With Optional WatchdogUltra-low supply-current voltage monitor with optional watchdog, U6
  13. Cypress S27KS0641 64-Mbit (8-MByte) HyperRAM™ Selfself-Refresh refresh DRAM, U4

Key Features

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Xilinx Artix-7 XC7A35T (A15 to A100T) 

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Commercial Temperature Grade (Industrial on Request)

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32 MByte Flash Memory

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2 x 50 Pin Headers with 2,54mm Pitch, Ideal for Breadboard Use

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3.3V Single Power Supply with On-Board Voltage Regulators

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Size 73 x 35 mm

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JTAG/UART Connector 

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2 LED's

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Signals, Interfaces and Pins

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BankVCCIOB2B I/ONotes
03.3V0JTAG
143.3V0 (3)3 I/O in XMOD-JTAG - for use as UART
151.8V0used for optional hyper RAM
162.5V0used for optional optical fiber transceiver
34User select420R resistor option to select 3.3V
35User select420R resistor option to select 3.3V

POF Transceiver

Image Removed

 
ModelBitrate MB/sNotes

AFBR-59F2Z

250

JTAG Interface

JTAG access to the Xilinx Artix-7 device is provided through connector JB1. 

SignalPin Number
TCKJB1:-4
TDOJB1:-8
TDIJB1:-10
TMSJB1:-12
JTAGVREF(VIO)JB1-6
GNDJB1-1, JB1-2

Connector JB1 (2 x 6 pin Headerheader) is directly compatible to with XMOD JTAG Adapter adapter TE0790. This adapter can be inserted from top onto the TE0725, if JB1 is fitted with male pin header. Optionally JB1 can be fitted with pin header from bottom, in that case the JTAG cable connector must be on the base board. When using XMOD-JTAG in JB1 then additionally USB UART is usable, and the push-button on XMOD works as configuration reset.

Recommended TE0790 (XMOD) DIP-switch settings :

  • S2-1: ON
  • S2-2: OFF
  • S2-3: OFF
  • S2-4: OFF

When using XMOD-JTAG please check the switch settings on XMOD to be sure the power and I/O reference are supplied correctly. TE0790 can be in some cases used to power up TE0725 (other TE0790 DIP settings), however this is not recommended. TE0790-01 can not supply enough power for TE0725 (LED may blink but the module is not operating properly, especially in case of larger and more sophisticated designs).

POF Transceiver

Image Added

ModelBitrate MB/sNotes

AFBR-59F2Z

250

On-board LED's

LEDColorFPGANotes
D2GreenM16 
D3RedDONEActive low

Connectors

All connectors are are for 100mil headers, all connector locations are in 100 mil grid. 


LEDColorFPGANotes
D2GreenM16 
D3RedDONEActive low

Power and Power-On Sequence

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Variants Currently In Production

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FPGA Chip Model

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VIN Supply Voltage [V]

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TE0725-03-35-2C

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TE0725-03-100-2C

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TE0725-03-100-2I9

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Trenz shop TE0725 overview page
English pageGerman page

Technical Specifications

Absolute Maximum Ratings

Parameter

MinMax

Units

Notes

Reference document
VIN

3.3V supply voltage

-0.1

3.6

V

  

HR I/O
Bank
banks supply voltage (VCCO)-0.53.6V
 Xilinx document
Xilinx datasheet DS181
HR I/O banks input voltage
for FPGA I/O banks
-0.4VCCO
_XGT Transceiver-0.51.26V Xilinx document DS181

Voltage on Module JTAG pins

-0.4

VCCO_0+0.55

V

VCCO_0 is 1.8V or 3.3V nominalXilinx document DS181
+ 0.55V
 Xilinx document DS181
Xilinx datasheet DS181

Storage Temperature

-40

+85

°C

  


Recommended Operating Conditions

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 ParameterMinMaxUnits
Notes
Reference document
VIN supply voltage3.1353.45V
  IO Bank supply voltage for

HR I/O banks supply voltage (VCCO)1.143.465V
 Xilinx document
Xilinx datasheet DS181
HR I/O banks input voltage
for I/O banks
-0.20VCCO + 0.20V
 Xilinx document
Xilinx datasheet DS181
Voltage on Module JTAG pins3.1353.465VFor assembly variant with
3.3V CONFIG Bank OptionXilinx document DS181
Operating Temperature0+85

°C



Note
Please check Xilinx datasheet DS181 for complete list of absolute maximum and recommended operating ratings for the Artix-7 device (DS181).

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Physical Dimensions

Please note that two different units are used on the figures below, SI system millimetermillimeters (mm) and imperial system thousandth thousandths of an inch(mil). This is because of the 100mil pin headers used, see also explanation below. To convert mil's mils to millimeters and vice versa use formula 100mil's = 2,54mm.

Image Modified

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Image Modified

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All 100 mil pin headers are in 100 mil grid, the M3 mounting holes are in 50 mil grid aligned to the centers of the 100mil headers. The module is symmetrical, turning it 180 degrees will keep all I/O and Power pins in both 50 pin headers in compatible places.

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Operating Temperature Ranges

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The module operating temperature range depends on customer design and cooling solution. Please contact us for options.

Weight

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Revision History

Hardware Revision History

DateRevision

Notes

PCNDocumentation
link
Link
2016-12-0903Second production releaseClick to see PCN
 
TE0725-03
-02First production release
 
TRM-

TE0725-02
-

01

Prototypes

  


Hardware revision number is printed on the PCB board together with the module model number separated by the dash.

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Document Change History 

REV03   REV03 Hardware REV02 Block Diagram added

V1

 
 Date

Revision

ContributorsDescription

Page info
infoTypeModified date
dateFormatyyyy-MM-dd
typeFlat

Page info
infoTypeCurrent version
prefixv.
typeFlat
showVersionsfalse

Page info
infoTypeModified by
typeFlat
showVersionsfalse

  • Block Diagram is updated.

2021-09-02

v.66

John Hartfiel

  • add JTAG notes.

2021-02-11

v.65

John Hartfiel

  • Replace Links.

2017-06-07

v.60

Jan Kumann
  • Minor formatting.

2017-01-27

v.57

Jan Kumann

  • New block diagram.

2017-01-12

v.46

Jan Kumann

  • Revision 03 product images added.

2016-12-15


Thorsten Trenz

  • Hardware
  • revision 03 specific information added.

2016-12-09

V40

v.40

Jan Kumann

  • Hardware revision 02 block diagram added.

2016-12-02

v.1

Antti Lukats

  • Initial version.

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