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Overview

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• 1 x Gbps Ethernet PHY transceiver
• 2 x 100 Mbps Ethernet PHY transceivers
• 512 MByte DDR3 Memory
• 32 MByte SPI Flash Memory
• eMMC (4 GByte in standard configuration)
•  USB PHY transceiver
• powerful switch-mode power supplies for all on-board voltages
• large number of configurable I/Os is provided via rugged high-speed stacking strips

Key Features

• Industrial-grade Xilinx Zynq-7000 (XC7Z020) SoM
• Rugged for shock and high vibration
• 2 x ARM Cortex-A9
• 1 x 10/100/1000 Mbps Ethernet transceiver PHY
• 2 x 10/100 Mbps Ethernet transceiver PHYs
• 3 x MAC-Address EEPROMs
• 16-Bit wide 512 MByte DDR3 SDRAM
• 32 MByte QSPI-Flash-Memory
• 4 GByte e-NAND-Flash-Memory (embedded eMMC Memory)
• USB 2.0 high-speed ULPI transceiver
• Plug-on module with 2 x two 120-pin high-speed hermaphroditic stripsconnectors
  • Evenly-spread supply pins for good signal integrity
  • 136 FPGA I/Os (58 LVDS pairs possible)
  and 6 PS MIOs available on board-to-board connectors
  • 8 PS MIO pins
• On-board high-efficiency DC-DC converters
  • 4.0 A x 1.0 V power rail
  • 1.5 A x 1.5 V power rail
  • 1.5 A x 1.8 V power rail
  • 1.5 A x 2.5 V power rail
• System management
• eFUSE bit-stream encryption
• AES bit-stream encryption
• Temperature compensated RTC (real-time clock)
• User LED
• Evenly-spread supply pins for good signal integrity

Assembly options for cost or performance optimization available upon request.

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The boot modes are controlled by the Pins 'BOOT1' and 'BOOT2' on the board to board (B2B) connector.

JTAG

JTAG access to the Xilinx Zynq-7000 device is provided by connector J2.

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Number of I/O's connected to the SoC's I/O bank and B2B connector:

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 The TE0729 is equipped with a Marvell Alaska 88E1512 Gigabit Ethernet PHY (U3) and has in this TRM the identifier Ethernet0. The Ethernet Ethernet0 PHY RGMII Interface is connected to the Zynq Ethernet0 ETH0 PS GEM0. The I/O Voltage is fixed at 1.8V for HSTL signaling. 

SGMII (SFP copper or fiber) can be used directly with the Ethernet PHY, as the SGMII pins are available on the B2B connector J2.

The reference clock input of the PHY is supplied from an on board 25MHz oscillator (U10).

Ethernet0 PHY connection:

There also two additional Microchip KSZ8081MLXCA Ethernet-PHYs (ICs U17 and U19) to provide further 10/100 Mbps Ethernet interfaces with the identifier Ethernet1 and Ethernet2. This PHYs can be operated as Ethernet interfaces 10BaseT or 100BaseT with for 4-wires twisted pair cable. The reference clock input of both PHYs is supplied from the 25MHz oscillator (U10), which also provide Ethernet0 PHY with a reference clock signal.

PHY connection Ethernet1:

USB

The USB PHY USB3320 from Microchip is used on the TE0729. The ULPI interface is connected to the Zynq PS USB0. The I/O Voltage is fixed at 1.8V.

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