Page History

Custom_table_size_100

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Module: TRM Name always "TE Series Name" +TRM
Example: "TE0728 TRM"

Template Change history:

Version	Changes	Author
4.2	Changes Xilinx to AMD	ED
4.1	Minor changes Notes Tables	ED
4.0	Rework for smaller TRM which can be generated faster Reduce Signal Interfaces Pin Reduce On Board Periphery Reduce Power Move Configuration Signals from Overview to own section	JH
3.12	Version History changed from list to table all changed title-alignment for tables from left to center	ma
3.11	update "Recommended Operating Conditions" section
3.1	New general notes for temperature range to "Recommended Operating Conditions"
3.02	add again fix table of content with workaround to use it for pdf and wiki Export Link for key features examples Notes for different Types (with and without Main FPGA) Export Link for Signals, Interfaces and Pins examples Notes for different Types (Modul, Modul Hybrid, Evalboard, Carrier)
3.01	remove fix table of content and page layout ( split page layout make trouble with pdf export) changed and add note to signal and interfaces, to on board periphery section ...(not finished)
3.00	→ separation of Carrier/Module and evaluation kit TRM
2.15	add excerpt macro to key features
2.14	add fix table of content add table size as macro

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Important General Note:

If some section is configurable and depends on Firmware, please refer to the addition page (for example CPLD). If not available, add note, that this part is configurable

Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)

Figure template:

Scroll Title

anchor	Figure_anchorname
title-alignment	center
title	Text

Scroll Ignore
Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Scroll Only
image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

Table template:
- Layout macro can be use for landscape of large tables

Scroll Title

anchor	Table_tablename
title-alignment	center
title	Text

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Example	Comment
1	2

The anchors of the Scroll Title should be named consistent across TRMs. A incomplete list of examples is given below
- <type>_<main section>_<name>
  - type: Figure, Table
  - main section:
    - "OV" for Overview
    - "SIP" for Signal Interfaces and Pins,
    - "OBP" for On board Peripherals,
    - "PWR" for Power and Power-On Sequence,
    - "B2B" for Board to Board Connector,
    - "TS" for Technical Specification
    - "VCP" for Variants Currently in Production
    - "RH" for Revision History
  - name: custom, some fix names, see below
- Fix names:
  - "Figure_OV_BD" for Block Diagram
  - "Figure_OV_MC" for Main Components
  - "Table_OV_IDS" for Initial Delivery State
  - "Table_PWR_PC" for Power Consumption
  - "Figure_PWR_PD" for Power Distribution
  - "Figure_PWR_PS" for Power Sequence
  - "Figure_PWR_PM" for Power Monitoring
  - "Table_PWR_PR" for Power Rails
  - "Table_PWR_BV" for Bank Voltages
  - "Table_TS_AMR" for Absolute_Maximum_Ratings
  - "Table_TS_ROC" for Recommended_Operating_Conditions
  - "Figure_TS_PD" for Physical_Dimensions
  - "Table_VCP_SO" for TE_Shop_Overview
  - "Table_RH_HRH" for Hardware_Revision_History
  - "Figure_RH_HRN" for Hardware_Revision_Number
  - "Table_RH_DCH" for Document_Change_History
Use Anchor in the document: add link macro and add "#<anchorname>
Refer to Anchor from external : <page url>#<pagename without space characters>-<anchorname>

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-----------------------------------------------------------------------

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Note for Download Link of the Scroll ignore macro:

Link to the base folder of the module (remove de/ or en/ from the URL):
Example: https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5_Carriers/TE0728/

Scroll Ignore
Download PDF version of this document.

Overview

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Notes :

short description of the PCB
Short Link of the wiki resources reference:
- Use short link the Wiki Resource page, for example: http://trenz.org/te0728-info
- List of available short links: https://wiki.trenz-electronic.de/display/CON/Redirects

The Trenz Electronic TE0703 carrier board provides functionality for development, evaluation and testing purposes of Trenz 4 x 5 cm SoMs (System on Module).

The carrier board is equipped with a broad range of various components and connectors for different configuration setups and needs. On-module functional components and multipurpose I/Os of the SoM's PL and PS logic are connected via board-to-board connectors to the carrier board components and connectors for easy user access.

See page "4 x 5 SoM Carriers" for more information about the SoM's supported by the TE0703 Carrier Board.

Refer to http://trenz.org/te0703-info for the latest online version of this manual and other available documentation.

Key Features

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Note:
'description: Important components and connector or other Features of the module
→ please sort and indicate assembly options

→ See examples for different types <Series Name> TRM Template section examples#%3CSeriesName%3ETRMTemplatesectionexamples-KeyFeatures

Excerpt

On Board:
- System Controller (SC) (LCMXO2-1200HC-4TG144I¹⁾)
- Mini USB for JTAG and UART connection (FTDI FT2232H), compatible with AMD and other vendor development tools
- SDIO port expander with voltage-level translation
- 4 x User LEDs
  - D1 and D2 are connected to the SC, their function depends on the firmware
  - D3 and D4 are connected to the SC and the 4 x 5 SoM and can be directly controlled by it
- 1 x User push button: Connected to the SC, the function is firmware depend
- 4 User DIP switches
  - JTAG selection
  - MIO0 (readable signal by SC and SoM)
  - 2 "mode" bits
Interface:
- Trenz 4 x 5 SoM socket: 3 x Samtec LSHM series high-speed connectors
- Micro SD card connector - Zynq SDIO0 bootable SD port
- 2 x VG96 backplane connectors (mounting holes and solder pads)
- Mini or Normal USB for SoM USB-OTG connection ¹⁾
- RJ45 GbE connector
Power:
- Overvoltage-, undervoltage- and reversed- supply-voltage-protection
- Barrel jack (2.1 mm) for 5V power supply input
Dimension:
- 100 mm x 64.5 mm
Notes

¹⁾Depends on assembly variant

Block Diagram

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add drawIO object in Scroll Ignore section and add reference image in Scroll Only.

Note
For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" . Title (not anchor) of all Scroll Title such as DrawIOs and Tables should be changed according to the Module name. Example: TE0812 Block Diagram All created DrawIOs should be named according to the Module name: Example: DrawIO of TE0812 Block Diagram should be named TE0812_OV_BD

Scroll Title

anchor	Figure_OV_BD
title-alignment	center
title	TE0703 block diagram

Scroll Ignore

draw.io Diagram

border	true

diagramName	TE0703-07_OV_BD
simpleViewer	false
width
links	auto
tbstyle	hidden
diagramDisplayName
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diagramWidth	642
revision	1

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Image Added

Main Components

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Notes :

Picture of the PCB (top and bottom side) with labels of important components
Add List below

Note
For more information regarding how to add board photos, Please refer to "Diagram Drawing Guidline" .

Scroll Title

anchor	Figure_OV_MC
title-alignment	center
title	TE0703 main components

Scroll Ignore

draw.io Diagram

border	true

diagramName	TE0703-07_OV_MC.drawio
simpleViewer	false
width
links	auto
tbstyle	hidden
diagramDisplayName
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diagramWidth	642
revision	1

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Image Added

System Controller (SC), U5
USB-to-JTAG/UART-FTDI, U4
SDIO Port Expander, U2
I²C Repeater, U7
Power Input Protection, U11
DCDC, U3
USB Power Supply Switch, U1
Push button, S1
4x Dip Switches, S2
LED, D1 (red), D2 (green)
LED, D3 (red), D4 (green)
Ethernet jack, J14
Samtec Razor Beam™ LSHM-150/130 B2B connector, JB1, JB2, JB3
VG96 Connector assembly option, J1, J2
+5V power jack, J13
microSD Card Socket, J3
Bank IO Voltages jumper, J5, J8, J9, J10
Voltage selection jumper for microSD Card IO, J11
Jumper Batterie Voltage , J7
Mini USB Type B jack (FTDI), J4
USB Host Connector, either a USB A jack, J6 or a Micro USB, J12

Initial Delivery State

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Note

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

Scroll Title

anchor	Table_OV_IDS
title-alignment	center
title	Initial delivery state of programmable devices on the module

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Storage device name	Content	Notes
EEPROM	AMD programmer license	Do not overwrite!
System Controller	Firmware	Visit TE0703 Firmware for further information.

Signals, Interfaces and Pins

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For subsection examples see: <Series Name> TRM Template section examples#%3CSeriesName%3ETRMTemplatesectionexamples-Signals,InterfacesandPins

Note
Table with all connectors and Designator List of different interfaces per connector IO CNT (for FPGA IOs where functionality can be changed by customer)

Connectors

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title	Board Connectors

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Connector Type	Designator	Interface	IO CNT
VG96	J1	JB1 - IO	48 SE / 24 DIFF
Pin Header	J7	JB1 - Battery Voltage	1
RJ-45 Ethernet	J14	JB1 - Ethernet	8
RJ-45 Ethernet	J14	U5 - ETH LED	4
VG96	J2	JB2 - IO	66 SE / 33 DIFF
VG96	J1	JB3 - IO	36 SE / 18 DIFF
USB Type A¹⁾	J6	JB3 - USB 2.0 OTG	3
Micro USB¹⁾Type A/B	J12	JB3 - USB 2.0 OTG	3
VG96	J2	SC - IO	18
B2B	JB2	SC - JTAG	4
B2B	JB2	SC - Reset	1
Mini USB Type B	J4	FTDI - USB 2.0	2
B2B	JB1	SC - UART	2
B2B	JB1	SC - MIO	2
microSD Card socket ²⁾	J3	SC - SD	6
microSD Card socket ²⁾	J3	JB1 - SD	6
VG96	J1	SC - I²C	2
VG96	J1	JB1 - I²C	2

¹⁾ Depending on the variant only one of the USB connectors is assembled.
²⁾ Depending on firmware microSD Card socket is connected to the SC or SoM.

Test Points

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you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delete the Test Point section.

Example:

Test Point	Signal	Notes¹⁾
TP1	PWR_PL_OK

¹⁾ Direction:

- IN: Input from the point of view of this board.
- OUT: Output from the point of view of this board.

Scroll Title

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title	Test Points Information

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Test Point	Signal	Notes
TP1	5VIN
TP2	5VIN
TP3	VIN
TP4	VIN
TP5	3.3V
TP6	3.3V
TP7	VCCIOA
TP8	VCCIOA
TP9	VCCIOB
TP10	VCCIOB
TP11	VCCIOC
TP12	VCCIOC
TP13	VCCIOD
TP14	VCCIOD
TP15	M1.8VOUT
TP16	M1.8VOUT
TP17	M3.3VOUT
TP18	M3.3VOUT
TP19	VBat
TP20	VBat
TP21	VCCJTAG
TP22	VCCJTAG
TP23	3.3V_SD
TP24	3.3V_SD
TP25	USB-VBUS_R
TP26	USB-VBUS_R
TP27	ETH-VCC
TP28	ETH-VCC
TP29	Vbus
TP30	Vbus

On-board Peripherals

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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection by assigning advance link using: #NameOfTheSection

Example:

Chip/Interface	Designator	Connected To	Notes
ETH PHY	U10	B2B connector J1 SoC MIO	Gigabit ETH PHY

Scroll Title

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title-alignment	center
title	On board peripherals

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Chip/Interface	Designator	Connected To	Notes
System Controller	U5	B2B SD Port Expander FTDI Push button DIP Switch LEDs	Visit TE0703 CPLD Firmware for further information.
FTDI	U4	SC
EEPROM	U10	FTDI	Preprogrammed with AMD programmer license. Do not overwrite!
Oscillator	U6	FTDI
SD IO Port Expander	U2	SC Via B2B connector JB1 to SoM microSD Card J3

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For example subsections see: <Series Name> TRM Template section examples#%3CSeriesName%3ETRMTemplatesectionexamples-On-boardPeripherals

Configuration and System Control Signals

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Overview all Controller signals, like Reset, Boote Mode, JTAG Interface(Connector or USB In case of FTDI)...
In case it's connected to CPLD always link to CPLD description and add not from the current implementation here(in case it's available)

Scroll Title

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title-alignment	center
title	Controller signal.

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Connector.Pin	Signal Name	Direction¹⁾	Description
S1	S1	IN	Push button ²⁾
S2.8	CM1	IN	DIP Switch ²⁾
S2.7	CM0	IN	DIP Switch ²⁾
S2.6	JTAGEN	IN	DIP Switch ²⁾
S2.5	MIO0	IN	DIP Switch ²⁾
J5.2	VCCIOA	OUT	SoM IO Bank supply ³⁾
J8.2	VCCIOB	OUT	SoM IO Bank supply ³⁾
J9.2	VCCIOC	OUT	SoM IO Bank supply ³⁾
J10.2	VCCIOD	OUT	SoM IO Bank supply ³⁾
J7.2	VBAT	OUT	Module battery power supply
J11.2	EN_3.3V_SD	IN	SD Card IO Voltage Select
J3.9	SD_CD	IN	SD Card socket Detect
JB3.54	VBUS_V_EN	IN	Enables USB Host Bus Voltage
JB2.17	RESIN	OUT	Reset signal
JB1.27	EN1	OUT	Power enable signal
JB1.29	PGOOD	INOUT	Power good and/or Boot mode select signal ²⁾
JB1.31	MODE	INOUT	Boot mode select signal ²⁾
JB1.8	NOSEQ	INOUT	Power Management and/or Select JTAG target on the SoM ²⁾
JB1.90	PROGMODE	INOUT	Select JTAG target on the SoM ²⁾
JB1.91 / JB1.86	MIO14 / MIO15	INOUT	UART to SoM ²⁾
JB1.100 / 98	MIO12 / MIO13	INOUT	Optional UART to SoM ^{2) 4)}
J2A.X16 / J2A.X17	X16 / X17	INOUT	Optional UART to SoM ^{2) 4)}
J1A.A1 / J1A.A2	MIO10-SCL / MIO10 MIO10-SDA / MIO11	INOUT	I2C bus ²⁾

¹⁾ Direction:

- IN: Input from the point of view of this board.
- OUT: Output from the point of view of this board.

²⁾ Firmware dependent. Refer to TE0703 CPLD - CC703S for further information.
³⁾ Select 1.8V or 3.3V via jumper. Refer to 4 x 5 Module Integration Guide for further information.
⁴⁾ Optional USB to UART available.

Power and Power-On Sequence

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Enter the default value for power supply and startup of the module here.

Order of power provided Voltages and Reset/Enable signals

Link to Schematics, for power images or more details

Power Rails

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List of all power rails which are accessible by the customer

Main Power Rails and Variable Bank Power

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title	Module power rails.

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Power Rail Name/ Schematic Name	Connector.Pin	Direction¹⁾	Notes
5VIN	J13.1	IN
5VIN	J2A.A1 / J2A.A2	OUT
3.3V	J1C.C31 / J2C.C31 / JB1.2 / JB1.4/ JB1.6/ JB1.14/ JB1.16 / JB2.1 / JB2.3 / JB2.5 / JB2.7	OUT
USB-VBUS	J6.1 / J12.1 / JB3.56	OUT
M1.8VOUT	JB1.40 / J11.1	IN
M1.8VOUT	J5.3 / J8.3 / J9.3 / J10.3 / J11.1	OUT
M3.3VOUT	JB2.9 / JB2.11	IN
M3.3VOUT	J5.1 / J8.1 / J9.1 / J10.1 / J1C.C32 / J2C.C32	OUT
VBAT	J7.2	IN
VCCJTAG	JB2.92	IN
ETH-VCC	JB1.13	IN
ETH-VCC	J14A.1	OUT
VCCIOA	JB1.10 / JB1.12 / J1B.B1	OUT	Selection via J5 ²⁾
VCCIOB	JB2.2 / JB2.4 / J1B.B32	OUT	Selection via J8 ²⁾
VCCIOC	JB2.6 / J2B.B32	OUT	Selection via J9 ²⁾
VCCIOD	JB2.8 / JB2.10 / J2B.B1	OUT	Selection via J10 ²⁾

¹⁾ Direction:

- IN: Input from the point of view of this board.
- OUT: Output from the point of view of this board.

²⁾ Select 1.8V or 3.3V via jumper. Refer to 4 x 5 Module Integration Guide for further information.

Recommended Power up Sequencing

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List baseboard design hints for final baseboard development.

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title	Baseboard Design Hints

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Sequence	Net name	Recommended Voltage Range	Pull-up/down	Description	Notes
0	-	-	-	Configuration signal setup.	See Configuration and System Control Signals.
1	5VIN	5V (± 5 %)	-	Main Power supply.	Main module power supply. 3 A recommended. Power consumption depends mainly on design and cooling solution.
2	M3.3VOUT / M1.8VOUT	3.3 V (± 3 %) / 1.8 V (± 3 %)	-	SoM generated voltages.	Availability signals operational module readyness to apply voltages to module banks.

Board to Board Connectors

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This section is optional and only for modules.
use "include page" macro and link to the general B2B connector page of the module series,
For example: 6 x 6 SoM LSHM B2B Connectors
Include Page
6 x 6 SoM LSHM B2B Connectors
6 x 6 SoM LSHM B2B Connectors

Include Page

	4 x 5 SoM LSHM B2B Connectors
	4 x 5 SoM LSHM B2B Connectors

Technical Specifications

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List of all power rails which are accessible by the customer

Main Power Rails and Variable Bank Power add boarder one time maximum Rating (Board will damaged)

This Table shows the real values and reasons for the limits, so that they do not get lost.

Power Rail / Schematic Name	Description	Min	Max	Unit	Notes	Reason for the limit
SD Card Limits	Limits for 3.3 V and 1.8 V SD Card supply. Only Recommanded values are given.	Rec: 2.7 1.7	Rec: 3.6 1.95	V	Supplied by M3.3VOUT and optional when SD IO Jumper set to M1.8VOUT.

5VIN	Carrier supply voltage rail before the input protection.	Abs: -40 Rec: 2.5	Abs: 60 Rec: 34	V	Voltages outside of the range 4.06 to 5.58 V will trigger the input protection. Supplies USB VBUS, which has a range of 4.75 to 5.5 V (5.25 older specification).
VCCIOA	SoM IO Bank Voltage.	-	-	V	Voltage can be supplied by M1.8VOUT, M3.3VOUT or externally by VG96 IO.
VCCIOB	SoM IO Bank Voltage.	-	-	V	Voltage can be supplied by M1.8VOUT, M3.3VOUT or externally by VG96 IO.
VCCIOC	SoM and Carrier Sc IO Bank 2 voltage.	Abs: -0.5 Rec: 1.14	Abs: 3.75 Rec: 3.6	V	Voltage can be supplied by M1.8VOUT, M3.3VOUT or externally by VG96 IO. System Controller Limits: Abs: -0.5 to 3.75 Rec VCC: 2.375 to 3.6 Rec IO: 1.14 to 3.6	Limited by Absolute Maximum Values of the Sc.
VCCIOD	SoM IO Bank Supply Voltage.	-	-	V	Voltage can be supplied by M1.8VOUT, M3.3VOUT or externally by VG96 IO.
M1.8VOUT	SoM supplied voltage. Range based on Carrier (± 3 %). Consult SoM requirements.	Abs: -0.3	Abs: 4.9	V	When suppling a SD Card, SD Card limits are 1.7 to 1.95 V. MP5077GG Limits: Abs: -0.3 to 6.5 Rec: 0.5 to 5.5	Q1/MP5077GG-Z is supplied via M3.3VOUT. The limiting factor is its Enabled Pin Voltage Limit. –0.3V to VCC_Q1/M3.3VOUT +0.3 V M3.3VOUT is limited by U2/TXS02612RTWR to 4.6 V. Therefor the limit is: M3.3VOUT +0.3
M3.3VOUT	SoM supplied voltage.	Abs: -0.5	Abs: 4.6	V	When suppling a SD Card, SD Card limits are 2.7 to 3.6 V.	Limited by U2/TXS02612RTWR.
VBAT	Dependent on SoM requirements.	-	-	V
VCCJTAG	SoM supplied JTAG Reference Voltage for Carrier SC IO Bank 3.	Abs: -0.5	Abs: 3.75	V	System Controller Limits: Abs: -0.5 to 3.75 Rec VCC: 2.375 to 3.6 Rec IO: 1.14 to 3.6	Limited by Absolute Maximum Values of the Sc.
ETH-VCC	ETH Bias Voltage from SoM.	-	-	V

Absolute Maximum Ratings ^*)

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Power Rail / Schematic Name	Description	Min	Max	Unit
5VIN	Main input power supply	-0.3	60	V
VCCIOA ^{1) 2)}	Module power supply.	-	-	V
VCCIOB ^{1) 2)}	Module power supply.	-	-	V
VCCIOC ^{1) 2)}	Module and Carrier power supply.	-0.5	3.75	V
VCCIOD ^{1) 2)}	Module power supply.	-	-	V
M1.8VOUT	Module and carrier power supply.	-0.3	1.95	V
M3.3VOUT	Module and carrier power supply.	-0.3	3.6	V
VBAT ¹⁾	Module battery power supply.	-	-	V
VCCJTAG	JTAG Reference Voltage	-0.5	3.75	V
ETH-VCC	Power supply for ETH connection.	-	-	V

¹⁾ Module-dependent.
²⁾ Voltage is intended to be supplied by M1.8VOUT or M3.3VOUT but can also be supplied externally via VG96 connection.

^*) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

This TRM is generic for all variants. Temperature range can differ depending on assembly variant. Voltage range should be mostly the same during variants (exceptions are possible, depending on custom request).

Temperature Range:

This carrier board is capable of being operated at industrial-grade temperatures, which cover at least the range of -40 °C to 85 °C.

The Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Voltage Rails:

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Power Rail / Schematic Name	Description	Min	Max	Unit
5VIN	Main input power supply	4.75	5.25	V
VCCIOA ^{1) 2)}	Module power supply.	-	-	V
VCCIOB ^{1) 2)}	Module power supply.	-	-	V
VCCIOC ^{1) 2)}	Module and Carrier power supply.	1.14	3.6	V
VCCIOD ^{1) 2)}	Module power supply.	-	-	V
M1.8VOUT	Module and carrier power supply.	1.746	1.854	V
M3.3VOUT	Module and carrier power supply.	3.201	3.399	V
VBAT ¹⁾	Module battery power supply.	-	-	V
VCCJTAG	JTAG Reference Voltage	1.14	3.6	V
ETH-VCC	Power supply for ETH connection.	-	-	V

¹⁾ Module-dependent.
²⁾ Voltage is intended to be supplied by M1.8VOUT or M3.3VOUT but can also be supplied externally via VG96 connection.

Physical Dimensions

Carrier size: 100 mm x 64.5 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: 8 mm.

PCB thickness: 1.64mm ± 10 %.

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id	Comments

In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM.

For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below:

https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF

Note
For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guideline" .

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Currently Offered Variants

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Set correct link to the shop page overview table of the product on English and German.

Example for TE0706:

ENG Page: https://shop.trenz-electronic.de/en/search?sSearch=TE0703

DEU Page: https://shop.trenz-electronic.de/de/search?sSearch=TE0703

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Trenz shop TE0703 overview page
English page	German page

Revision History

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Set correct links to download Carrier, e.g. TE0706 REV02:

TE0706-02 -> https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0706/REV02/Documents

The hardware revision number is on the PCB adjacent to the module identifier, separated by a dash.

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Hardware Revision History

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Date	Revision	Changes	Documentation Links
2023-09	07	1. Changed DCDC EN6347QI ( U3 ) to MPM3860GQW-Z. 2. Changed load switch TPS27081ADDCR ( Q1 ) to MP5077GG-Z. 3. Changed clock SiT8008AI-73-XXS-12.000000E ( U6 ) to SiT8008BI-73-XXS-12.000000E. 4. Changed SD Card connector ( J3 ) from 504077-1891 to MEM2052-00-195-00-A. 5. Changed USB connector ( J12 ) from 629105150521 to 629105150921. 6. Changed pin header ( J7 ) from two pins to three pins and added jumper J20 . 7. Added testpoints TP1 ... TP30 . 8. Changed voltage rating for 1 uF capacitors ( C38 , C39 ) from 6.3 V to 16 V. 9. Changed voltage rating for 47 μF capacitor ( C48 ) from 6.3 V to 10 V and size from 1206 to 0805. 10. Changed tolerance for 22 μF capacitor ( C22 ) from 10 % to 20 % and size from 1206 to 0805. 11. Changed resistor values for 10 kOhm resistors ( R10 , R14 , R24 , R27 , R37 , R38 ) to 12 kOhm. 12. Changed resistor values from 4.7 kOhm to 5.1 kOhm for resistors R17 ... R20 . 13. Changed fiducials. 14. Named Q1 enable signal to " EN_3.3V_SD ". 15. Added decoupling capacitors: 15.1 C55 , C57 ... C61 for U5. 15.2 C62 ... C64 for J3. 15.3 C65 for U1. 16. Added pull-up resistor R43 for " USB_OC ". 17. Removed VG96 from BOM. 18. Removed S/N Track-it pad. 19. Added UKCA logo. 20. Changed address on silkscreen. 21. Updated components from library. 22. Updated revision history. 23. Updated documentation. 24. Updated power overview.	REV07 Documentation PCN-20230705
2019-04	06	1. microSD card connector ( J3 ) changed to industrial 2. changed PB ( S1 ) to industrial 3. replaced input power protection 4. added jumper ( J11 ) to select SD level shifter voltage on FPGA side 5. added power switch for SD level shifter supply voltages to ensure power sequenzing of level shifter 6. replaced R5 and VBUS capacitors, add 0Ohm resistors to OTG-ID 7. replaced jumpers by SMD versions, moved VBAT to other position 8. routing lenght of diff pairs B34_L17, B34_L15, B34_L21, B34_L13, B34_L10, B34_L20 changed 9. Replaced R31 by 953K and R25 by 147K 10. Added SD IO voltage selection jumper 11. TE0703-06 Under Voltage Protection Change. Replaced R31 by 953kOhm and R35 by 147kOhm 12. Set S/N Track-it pad not fitted	REV06 Documentation PCN-20190826 PCN-20190104
2016-11	05	1. Added Jumpers for VCCIO Voltage strapping 2. Changed PWR connector to SMD type 3. Changed FTDI from FT2232HQ to FT2232H-56Q 4. Changed Micro SD card socket from SCHD3A0100 to Molex 104031-0811 5. Added series resistors 10K to FLED0, FLED1 and connect to CPLD 6. Added Track-it™ Traceability Pad 7. Remove R43 8. Replaced MagJack connector from WE7499111446 to TRJG4820G4NL 9. Changed micro-USB 10. U8 MP5010ADQ-LF-Z replaced to MP5010BDQ-LF-Z	REV05 Documentation PCN-20161122
2014-12	04	Corrected FTDI EEPROM connection	REV04 Documentation
2014-08	03	Added VCCIO strapping resistors	REV03 Documentation
2013-12	02	First series boards	REV02 Documentation
-	01	Prototypes	REV01 Documentation

Document Change History

Date

Revision

Contributors

Description

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Updated to TRM template v.4.2
Updated/Reworked the whole TRM content

2023-09-04

v.45

ED

Updated to REV07

2022-09-23

v.44

Mohsen Chamanbaz

Changing in the dip-switches table because of updating of CPLD firmware (CPLD Firmware REV03)

2019-10-07

v.43

Martin Rohrmüller

updated to REV06
updated to TRM style 2.12

2018-06-13

v.29

Ali Naseri

updating operating conditions

2017-02-07

v.28

John Hartfiel

Add DIP setting description

2017-11-09

v.26

John Hartfiel

add B2B connector section

2017-02-21

v.19

Jan Kumann

New block diagram.

2017-02-02

v.16

Jan Kumann

New board image with silk screen pin markings for VG96 connectors J1 and J2.

2016-12-22

v.14

Jan Kumann

Block diagram added.

2016-12-08

v

...

Download PDF version of this document.

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Table of Contents

Table of Contents

Overview

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Refer to https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/carrier_boards/TE0703 for online version of this manual and other documents available about the product.

The Trenz Electronic TE0703 Carrier Board is a base-board for 4x5 SoM's, which exposes the MIO- and the PS/PL-pins of the SoM to accessible connectors and provides a whole range of on-board-components to test and evaluate Trenz Electronic 4x5 SoM's.

See page "4 x 5 cm carriers" to get information about the SoM's supported by the TE0703 Carrier Board.

Block Diagram

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Main Components

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Samtec Razor Beam™ high-speed hermaphroditic 50 positions terminal strip, board to board connector, JB1
Samtec Razor Beam™ high-speed hermaphroditic 50 positions terminal strip, board to board connector, JB2
Samtec Razor Beam™ high-speed hermaphroditic 30 positions terminal strip, board to board connector, JB3
Micro SD card socket with detect switch, J3
LED indicators D1 and D2
Mini-USB B connector, J4
LED indicators D3 and D4
Configuration DIP switches, S2 (see table under "DIP switches" section)
User push button (Reset), S1
External connector (VG96) placeholder, J1
External connector (VG96) placeholder, J2
VCCIO voltage selection jumper block, J5, J8, J9 and J10 (see "Power and Power-On Sequence" section)
Trxcom 1000Base-T Gigabit RJ45 Magjack, J14
USB type A receptacle, J6 (optional micro USB 2.0 type B receptacle available, J12)
5V power connector jack, J13

Key Features

2 x VG96 backplane connectors (mounting holes and solder pads)
SDIO port expander with voltage-level translation
Micro SD card socket, can be used to boot system
4 x user LED's, 2 x red and 2 x green
Mini USB connector (USB JTAG and UART interface)
1 x user-push button routed to CPLD. By default it is configured as system reset button.
RJ45 Gigabit Ethernet socket with 4 integrated LED's.
USB Host Connector
Barrel jack for 5 V Power Supply input
4 A High-Efficiency Power SoC DC-DC Step-Down Converter(Enpirion EN6347) for 3.3 V Power Supply
Trenz 4x5 Module Socket (3 x Samtec LSHM series connectors)
USB JTAG and UART Interface (FTDI FT2232H), compatible with Xilinx Tools (also with many other tools)
2 x User configurable DIP switches

Initial Delivery State

Board is shipped in following configuration:

VCCIO voltage selection jumpers are all set to 1.8 V.
S1 switch configured as reset button in CPLD.
Two VG96 backplane connectors are not soldered to the board, but they are included in the package as separate components.
S2 DIP switches are configured as follows:

...

S2-3

...

Different delivery configurations are available upon request.

Signals, Interfaces and Pins

Board to Board (B2B) I/O's

For detailed information about the B2B pin out, please refer to the Master Pin-out Table.

Micro SD Card Socket

Micro SD Card socket is not directly wired to the B2B connector pins, but through a Texas Instruments TXS02612 SDIO port expander, which is needed for voltage translation due to the different voltage levels of the Micro SD Card and MIO bank 501 of the Xilinx Zynq 7000 chip. The Micro SD Card has 3.3 V signalling, but the MIO Bank 501 on the Xilinx Zynq 7000 chip is set to 1.8 V.

Dual channel USB UART/FIFO

TE0703 has on-board USB 2.0 High Speed UART/FIFO FT2232HQ from FTDI. Channel A can only be used in simple UART mode, Channel B can be used as UART, FIFO, JTAG (MPSSE) or High Speed Serial modes. An standard 256 Byte EEPROM to store custom Configuration settings for FT2232H is available. EEPROM settings can be changed using FTDI provided tools that can be downloaded from FTDI website. See FTDI website for more information.

Ethernet

On-board ethernet jack J14 pins are routed to B2B connector JB1. Ethernet jack J14 LED's are all routed to CPLD Bank 1.

USB Interface

TE0703 board has two physical USB sockets:

J4 as mini USB type B socket wired to the on-board FTDI FT2232H chip.
J6 as USB type A wired to B2B connector JB3 (actual USB transceiver present on the SoM depends on the SoM model).

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JTAG Interface

JTAG access to the CPLD and Xilinx Zynq chip on the SoM is provided via Mini-USB JTAG Interface (FTDI FT2232H) and controlled by DIP switch S2-3. JTAG pins are routed from CPLD to the JB2 connector as follows:

...

JTAG Signal

...

B2B JB2 Connector Pin

...

LED's

There are four LED's on-board:

...

LED's D3 and D4 are also connected to the B2B connector JB2 pins FLED1 and FLED2 respectively and can be controlled by 4x5 SoM FPGA module.

DIP switches

...

Power and Power-On Sequence

Power supply with minimum current capability of 3A for system startup is recommended.

Power Supply

TE0703 needs one single power supply with nominal of 5V.

Power Consumption

...

Typical power consumption for TE0703-05 + TE0715-01 module with SD micro card inserted, ethernet connected, link up, system booted into Linux prompt and idling is 5V / 0.55A.

Power-On Sequence

It is not allowed to feed any voltage to any external I/O pin before there is no power indication on M3.3VOUT pins. Presence of 3.3V on B2B JB2 connector pins 9 and 11 indicates that module is properly powered up and ready.

If any of the VCCIOA, VCCIOB, VCCIOC or VCCIOD will be powered through external connectors J1 or J2, then corresponding VCCIO jumper should also be removed altogether, see next chapter.

VCCIO voltage selection jumpers J5, J8, J9 and J10

Refer to the 4x5 Module Integration Guide for VCCIO voltages options.

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...

Jumper J5

...

VCCIOA

...

Jumper J8	1-2	2-3	Voltage
VCCIOB	ON	OFF	1.8 V
VCCIOB	OFF	ON	3.3 V

...

Technical Specifications

Absolute Maximum Ratings

...

Parameter

...

Units

...

Supply Voltage VCC

...

-0.33

...

5.5

...

V

...

-40

...

+125

...

°C

...

Storage temperature

...

-55

...

+125

...

°C

...

Recommended Operating Conditions

...

Parameter

...

Units

...

Supply Voltage VCC

...

4.75

...

5.25

...

V

...

0

...

+70

...

°C

...

Note
Assembly variants for higher storage temperature range are available on request.

Note
Please check components datasheets for complete list of absolute maximum and recommended operating ratings.

Physical Dimensions

Board size: PCB 100mm × 64.5mm. Notice that the mini USB-B jack on the left and ethernet RJ-45 jack on the right are hanging slightly over the edge of the PCB making the total width of the longer side approximately 106mm. Please download the assembly diagram for exact numbers.
Mating height of the module with standard connectors: 8mm
PCB thickness: 1.65mm
Highest parts on the PCB are USB type A jack and ethernet RJ-45 jack, approximately 15mm. Please download the step model for exact numbers.

All dimensions are given in millimeters.

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Operating Temperature Ranges

Commercial grade: 0°C to +70°C.

Industrial grade: -40°C to +85°C.

Board operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Weight

42g - Plain board

13g - VG96 connector x 2

Revision History

Hardware Revision History

...

Date

...

Revision

...

Notes

...

PCN

...

07.09.2016

...

05

...

Added VCCIO Jumpers

...

PCN-20161122

...

-

...

04

...

Corrected FTDI EEPROM connection

...

-

...

-

...

03

...

Added VCCIO strapping resistors

...

-

...

-

...

02

...

First series boards

...

-

...

-

...

01

...

Prototypes

...

-

Hardware revision number is printed on the PCB board next to the module model number separated by the dash.

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Document Change History

...

Date

...

Rrevision

...

Contributors

...

Description

...

V.01

...

table.
2016-09-06	v.1	Jan Kumann, John Hartfiel	Initial document.

Disclaimer

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	IN:Legal Notices
	IN:Legal Notices

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Trenz Electronic Documentation

Page History

Versions Compared

Old Version 13

New Version Current

Key

Overview

Key Features

Block Diagram

Main Components

Initial Delivery State

Signals, Interfaces and Pins

Connectors

Test Points

On-board Peripherals

System Controller

FTDI

EEPROM

Oscillator

SD IO Port Expander

Configuration and System Control Signals

Power and Power-On Sequence

Power Rails

Recommended Power up Sequencing

Board to Board Connectors

Technical Specifications

Absolute Maximum Ratings *)

Recommended Operating Conditions

Temperature Range:

Voltage Rails:

Physical Dimensions

Currently Offered Variants

Revision History

Hardware Revision History

Document Change History

Overview

Block Diagram

Main Components

Key Features

Initial Delivery State

Signals, Interfaces and Pins

Board to Board (B2B) I/O's

Micro SD Card Socket

Dual channel USB UART/FIFO

Ethernet

USB Interface

JTAG Interface

LED's

DIP switches

Power and Power-On Sequence

Power Supply

Power Consumption

Power-On Sequence

VCCIO voltage selection jumpers J5, J8, J9 and J10

Technical Specifications

Absolute Maximum Ratings

Recommended Operating Conditions

Physical Dimensions

Operating Temperature Ranges

Weight

Revision History

Hardware Revision History

Document Change History

Disclaimer

Table of contents

Absolute Maximum Ratings ^*)