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The purpose of the jumpers and the DIP-switch S4 of the Carrier Board will be explained in the following sections.
Configuring VCCIO-Voltage as example on mounted 4x5 SoM TE0720
The Zynq-module power supply is fixed to 5V!
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Summary of VCCIO- and supply-voltage-configuration via jumpers
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There are two base board supply-voltages VIOTA, VIOTB and for the 4x5 SoM's PL IO-banks. The supply-voltages have following pin assignments on B2B-connectors:
base-board VCCIO | base-board B2B connector-pins | standard assignment of PL IO-bank supply-voltages on TE 4x5 modules B2B connectors |
|---|---|---|
| VIOTA | JB2-2, JB2-4, JB2-6 | VCCIOB (JM2-1, JM2-3) / VCCIOC (JM2-5) |
| VIOTB | JB1-10, JB1-12, JB2-8, JB2-10 | VCCIOA (JM1-9, JM1-11) / VCCIOD (JM2-7, JM2-9) |
The corresponding PL IO-bank supply-voltages of the 4x5 SoM to the selectable base-board voltages VIOTA and VIOTB are depending on the mounted 4x5 SoM and varying in order of the used model. Refer to the SoM's schematic to get information about the specific pin assignments on B2B-connectors regarding the PL IO-bank supply-voltages and to the 4x5 Module Integration Guide for VCCIO voltage options.
Following table gives the B2B-connector pin assignments regarding the supply voltages of the PL IO-banks of 4x5 SoMs.
supported 4x5 SoMs vs base-board VCCIO | TE0710 | TE0711 | TE0712 | TE0713 | TE0715-xx-15 | TE0715-xx-30 | TE0720 | TE0741 | TE0841 |
|---|---|---|---|---|---|---|---|---|---|
| VIOTA | NC | B34 (VCCIOB) | B13 (VCCIOB) | - | B34 (VCCIOC) | B34 (HP bank, VCCIOC) | B33 (VCCIOC) B34 (VCCIOB) | B15 (VCCIOC) B16 (VCCIOB) | B66 (HP bank, VCCIOB) B68 (HP bank, VCCIOC) |
| VIOTB | B15 (VCCIOA) B34 (VCCIOD) | B15 (VCCIOA) B35 (VCCIOD) | B16 (VCCIOA) B15 (VCCIOD) | - | B13 (VCCIOA) B35 (VCCIOD) | B13 (VCCIOA) B35 (HP bank, VCCIOD) | B35 (VCCIOA) B13 (VCCIOD) | B13 (VCCIOA) B12 (VCCIOD) | B64 (VCCIOA) B67 (HP bank, VCCIOD) |
Jumper
Jumper
positions
J17
J16
J21 J18 J9 J19 J20
open
base-board supply-voltages vs |
|---|
voltage- |
|---|
levels |
|---|
| VIOTA |
|---|
| VIOTB |
|---|
| USB-VBUS | 12V0_CL | |
|---|---|---|
| 3V3 | J17:1-2, 3 & J16: open | J17: 1-2, 3 & J16: open & J21:1-2, 3 |
| - | - | |||
| 2V5 | J17:1, 2-3 & J16: open | J17:1, 2-3 & J16: open & J21: 1-2, 3 | - | - |
| FMC-VADJ | J17: open & J16: 1-2 | J21:1, 2-3 | - |
| - |
| 5V0 intern |
| - |
| Vbus extern |
| - | |||
| 12V_LC |
| - |
Power On Reset (POR)
On the TE0701 the 5.0V and 3.3V power supply rails are generated by high performance DC-DC-converters from the external 12V supply. While the 3.3V plane supplies several on-board components (e.g., Lattice CPLD and FTDI Dual USB UART/FIFO IC), the 5V plane is mainly provided to power supply of the module to be carried (e.g., TE0720 Zynq SoC module). For the latter, however, special considerations must be taken (see TE0720 Power Supply). Therefore, the on-module system controller (SC) must be provided with information about the power-on-reset (POR) process, namely, the following control signals EN1, RESIN, and NOSEQ. And the SC provides, in turn, the status signal PGOOD down to the on-board System-Controller-CPLD.
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