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changes.mady.by.user John Hartfiel

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New Version 37

changes.mady.by.user Martin Rohrmüller

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Comment: Typo

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 DateRevisionNotesLink to PCNDocumentation Link
2019-03-1803
  • Added support of DDP DDR4
  • Added support of Low power FPGA (-L1/L2).
  • Revised testpoints
  • Revised J1-J4 connectors net label style
TE0803 Product Change NotificationsTE0803-03
2018-07-1902
  • Added LDO to DDR_PLL
  • All differential pairs wath length matched with tollerance 0.1mm (excluding package delays)
  • Added MAC EEPROM U28
  • VPS_MGTRAVCC set to 0.85V
  • Added pull-up resistors R68, R69
TE0803 Product Change NotificationsTE0803-02
2016-12-2301First production release-TE0803-01

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 DateRevisionContributorsDescription

Page info
modified-date
modified-date
dateFormatyyyy-MM-dd

Page info
infoTypeCurrent version
dateFormatyyyy-MM-dd
prefixv.
typeFlat

Page info
infoTypeModified by
typeFlat

  • typo
2019-07-15v.36John Hartfiel
  • correction SPLL section
2019-07-02v.35John Hartfiel
  • add eeprom section
  • update PCB Revision section
2019-06-19v.33John Hartfiel
  • update links
  • correction flash section

2018-08-20

v.29John Hartfiel
  • power section: add missing PS_1V8 output pin

2018-08-06

v.28John Hartfiel
  • typo correction
2017-11-13v.23Ali Naseri
  • updated B2B connector max. current rating per pin

2017-11-13

v.19



John Hartfiel
  • rework B2B section
2017-10-19

v.18

John Hartfiel
  • Removed ES1 Note
2017-08-15v.17Vitali Tsiukala
  • Changed Signals Count in the table B2B-connectors

2017-08-07


v.14

Jan Kumann
  • New smaller images.
  • New QSPI Flash MIO mapping table.
  • Temperature information changes.
  • Few corrections.

2017-05-17

V.4


Ali NaseriCurrent TRM release.
2017-05-10v.1Ali NaseriInitial document.

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