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The RX-/TX-data-lanes are connected to B2B-connector JB2, the control-lines are connected to module's IO-pins on B2B-connector JB1 (MIO0-bank-pins in standard TE module's pin-assignment).
On this SFP+ connector, on at both 4 x 5 SoMs TE0741 and TE0841 MGT-lane 3 is accessible.
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The JTAG-interface of the mounted 4 x 5 SoM can be accessed via header JX1. This header has a 'XMOD FTDI JTAG Adapter'-compatible pin-assignment.:
| JX1 pin | JX1 pin net-name | B2B |
|---|---|---|
| C (pin 4) | TCK | JB3-100 |
| D (pin 8) | TDO | JB3-98 |
| F (pin 10) | TDI | JB3-96 |
| H (pin 12) | TMS | JB3-94 |
| A (pin 3) | MIO15 | JB1-86 (usable as UART RX/TX-line) |
| B (pin 7) | MIO14 | JB1-91 (usable as UART RX/TX-line) |
| E (pin 9) | BOOTMODE | JB1-90 (JTAGSELECT) |
| G (pin 11) | RESIN | JB3-17 |
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There is also the option to mount and solder a 2-row 16-pin header to the place-holder J3, which has the same pin-assignment as header JX1, but with two additional pins (15,16) as LVDS-pair to put supply the mounted 4 x 5 SoM with an external reference clock-signal to the mounted 4 x 5 SoM. The clock-signal is put linked to the SoM via B2B-connector pins JB2-32 (MGT_CLK0_N, J3-16) and JB2-34 (MGT_CLK0_P, J3-15).
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