Page History

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• SFP+ connector (Enhanced small form-factor pluggable), supports data transmission rates up to 10 Gbit/s
• Micro-USB-Interface (J10) connected to Zynq-module (Device or OTG mode)
• Trenz 4x5 module Socket (3 x Samtec LSHM series connectors)
• 4x5 SoM programable by JTAG header (JX1)
• 2 x user LEDs routed to IO-pins of the SoM
• Soldering-pads J17 and J20 as place-holder for further possibilities to access to SoMs for optional pin headers for access to SoM's IO-bank-pins, usable as LVDS-pairs
• Soldering-pads J3 and J4 as place-holder for optional pin headers for access to JTAG/UART- or SDIO-port further interfaces and IO's of the SoM

Interfaces and Pins

SFP+ Connector

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The TEBA0841 Carrier Board is mainly for the 4 x 5 SoMs TE0841 and TE0741. This SoMs have GTX-Transceiver units on their FPGA-modules with up to 8 available MGT-lanes. To test this MGT-lanes, 5 RX/TX differential pairs are bridged on-board, hence the transmitted data on this MGT-lanes flows back to their source sources in a loop-back circuit without intentional processing or modification. 

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On both interfaces (JX1, J3), the pins with the net-names MIO14 and MIO15 are available as user IO's which could be used as UART-interface for example.

LEDs

There are two LEDs D1 (green) and D2 (red) available to the user. The green LED D1 is connected to the pin JB1-92 with the net-name 'MIO9', the red LED D2 is connected to the pin JB3-90 with the net-name 'RLED'.

Header place-holder J4

Two LEDs are present on the TEBB0714 base-board with following functionality:

Table 4: LED's functionality

Header place-holder J4

The place-holder J4 The place-holder J4 with solder-pads to mount a 2-row 10-pin header provides the capability, to access via this header the SDIO-port of the mounted 4 x 5 SoM, if available. For this purpose, there is also voltage-translation via SDIO port expander (e.g. Texas Instruments TXS02612) necessary due to the different voltage levels of the Micro SD Card (3.3V) and MIO0-bank of the Xilinx Zynq-chip (1.8V).

In other cases the connector J4 can be used to access the PL IO-bank-pins of the SoM.

Header place-holder J17 and J20

Place holders for optional pin-headers

The TEBA0841 base-board has place-holders The place-holders J17 and J20 with solder-pads to mount 2-row 50-pin headers provide the capability optional pin-headers capable to access the PL IO-bank pins of the mounted 4 x 5 SoM. With mounted header J17 there are 42 IO's of PL-IO-bank 13 of the 4 x 5 SoM available (B2B-connector JB3), which are also usable as 21 LVDS-pairs. On this header the IO's are operable with fixed (3.3V) or selectable VCCIO-voltage VCCIOD. On header J20 there are 42 IO's available of PL-IO-bank 35 (B2B-connector JB1). This IO's are also usable as 21 LVDS-pairs and operable with fixed (3.3V) or selectable VCCIO-voltage VCCIOA.pin-headers SoM's IO's are available to the user, a large quantity of these IO's are also usable as  LVDS-pairs. This pin-headers provide also VCCIO voltages to operate the IO's properly.

Following table gives a summary of the optional pin-headers of the base-board:

Table 5: Summary of optional pin-headers

Power

Power Supply

Power supply with minimum current capability of 3A at 3.3V for system startup is recommended.

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The PL IO-bank supply-voltages 1.8V, 2.5V and 3.3V will be available after the mounted module's 3.3V voltage level is present has reached stable state on B2B-connector pins JM2 pins -10 and JM2-12, meaning that all on-module voltages have become stable and module is properly powered up.

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Technical Specifications

Absolute Maximum Ratings

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