Page History

...

• Industrial-grade Xilinx Zynq-7000 (XC7Z020) SoM
• Rugged for shock and high vibration
• 2 x ARM Cortex-A9
• 1 x 10/100/1000 Mbps Ethernet transceiver PHY
• 2 x 10/100 Mbps Ethernet transceiver PHYsPHY's
• 3 x MAC-Address EEPROMsEEPROM's
• 16-Bit wide 512 MByte DDR3 SDRAM
• 32 MByte QSPI - Flash -Memorymemory
• 4 GByte e-NAND - Flash -Memory memory (embedded eMMC Memory)
• USB 2.0 high-speed ULPI transceiver
• Plug-on module with two 120-pin connectors
  • Evenly-spread supply pins for good signal integrity
  • 136 FPGA I/Os (58 LVDS pairs possible)
  • 8 PS MIO pins
• On-board high-efficiency DC-DC converters
  • 4.0 A x 1.0 V power rail
  • 1.5 A x 1.5 V power rail
  • 1.5 A x 1.8 V power rail
  • 1.5 A x 2.5 V power rail
• System management
• eFUSE bit-stream encryption
• AES bit-stream encryption
• Temperature compensated RTC (real-time clock)
• User LED

...

Special purpose pins used by TE0729

Boot Modes

TE0729 supports primary boot from

...

The boot modes are controlled by the Pins 'BOOT1' and 'BOOT2' on the board to board (B2B) connector.

JTAG

JTAG access to the Xilinx Zynq-7000 device is provided by connector J2.

Clocking

Processing System (PS) Peripherals

Default MIO mapping

I2C Interface

The on-board I2C components are connected to MIO10 and MIO11 and configured as I2C0 by default.

I2C addresses for on-board components

B2B I/O

Number of I/O's connected to the SoC's I/O bank and B2B connector

For detailed information about the pin out, please refer to the Master Pinout Pin-out Table.

Peripherals

LED's

 There are 3 LED's on TE0729:

...

Ethernet0 PHY connection:

The TE0729 SoM is also equipped with two additional Microchip KSZ8081MLXCA Ethernet -PHYs (ICs PHY's (IC's U17 and U19) to provide further 10/100 Mbps Ethernet interfaces with the identifiers Ethernet1 and Ethernet2. The reference clock input of both PHYs is supplied from the same 25MHz oscillator (U10), which also provides Ethernet0 Gigabit PHY with a reference clock signal.

Ethernet1 PHY connection to B2B-connectors:

Ethernet2 PHY connection to B2B-connectors:

All other pins of the PHYs are connected to Bank34 of Zynq, see schematic for further details.

...

The reference clock input of the PHY is supplied from an on board 52MHz oscillator (U12).  

PHY connection:

The schematic for the USB connector and required components is different depending on the USB usage. USB standard A or B connectors can be used for Host or Device modes. A Mini USB connector can be used for USB Device mode. A USB Micro connector can be used for Device mode, OTG Mode or Host Mode.

...

This RTC IC is supported in Linux so it can be used as hwclock device.

MAC-Address

...

EEPROM's

Three Microchip 24AA025E48 EEPROMs EEPROM's (U8, U9, U20) are used on the TE0729. They contain globally unique 48-bit node addresses, that are compatible with EUI-48(TM) and EUI-64(TM). The devices are organized as two blocks of 128 x 8-bit memory. One of those blocks stores the 48-bit node address and is write protected, the other block is available for application use. It is accessible through the I2C slave address 0x50 for MAC-Address1 (U8), 0x51 for MAC-Address2 (U9), 0x52 for MAC-Address3 (U20).

...

VIN and 3.3VIN can be connected to the same source (3.3 V).

Power Supplies

Bank Voltages

Initial Delivery state

Power-up sequence at start-up

The Trenz TE0729 is equipped with several DC-DC-voltage-regulators to generate the required on-board voltages with the values 1V (FPGA core), 1.8 V (VCC0 MIO, VCCAUX, AVCC, VCCPLL, VDD USB and ETH PHYs), 1.5V (DDR3), 2.5V (Industrial fast ETH-PHY's) and 3.3V (VCCIO, pheripheral components).

In the first step at device start-up the voltages 1V and 1.8V are generated for the FPGA core and programmable logic banks. The voltages 1.5V and 2.5 V are enabled after the voltage 1V has stabilized. The voltage 3.3V is enabled by the CPLD system controller at last.

The voltage 3.3V is available on B2B-connector at pins J1-65, J1-66 and an indicator for stabilized on-board voltages in steady state.

Pay attention to the voltage level of the I/O-signals, which must not be higher then VCCIO+0.4V.

Image Added

Initial Delivery state

Hardware Revision History

Technical Specification

Absolute Maximum Ratings

...

Recommended Operating Conditions

Physical Dimensions

Please download the assembly diagram for exact values.

...

All dimensions are shown in mm.

Temperature Ranges

Commercial grade modules

...

All parts are at least industrial temperature range of -40°C to +85°C. The module operating temperature range depends on customer design and cooling solution. Please contact us for options.

Document Change History

Disclaimer

...

...