Page History

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Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/SC-CPLD-Firmware

Overview

CPLD Device with designator U1: LCMX02-256HC. Firmware with Standard DIPFORTY Configuration for XMOD.

Feature Summary

• JTAG routing
• Pinheader routing

Firmware Revision and supported PCB Revision

See Document Change History

Product Specification

Port Description

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Name / opt. VHD Name	Direction	Pin	Description
A	inout	8	XMOD Pin Header / UART RXD (input to adapter)TCK
ACBUS4		27	FTDI / currently_not_used
ACBUS5		28	FTDI / currently_not_used
ADBUS4		5	FTDI / currently_not_used
B	out	12	XMOD Pin Header / UART TXD (output from adapter)TMS
BDBUS2	in	21	FTDI / currently_not_used
BDBUS3	out	20	FTDI / currently_not_used
C	outin	9	XMOD Pin Header / UART RXD (input to adapter)
D	inout	11	XMOD Pin Header / UART TXD (output from adapter)
E	in	14	XMOD Pin Header / TDO
F	out	13	XMOD Pin Header / TDI
FT_B_RX / BDBUS1	out	25	FTDI
FT_B_TX / BDBUS0	in	23	FTDI
G	in	17	XMOD Pin Header / Pushbutton S1
H	out	16	XMOD Pin Header / currently_not_used
JTAGEN	in	26	Enable JTAG access to CPLD for Firmware update (zero: normal IOs, one: CPLD JTAG access). Selectable over S2-1
TCK / ADBUS0	in	30	FTDI
TDI / ADBUS1	in	32	FTDI
TDO / ADBUS2	out	1	FTDI
TMS / ADBUS3	in	29	FTDI
ULED	out	10	LED D4 (RED)
XCLK	in	4	12 MHz OSCI Ref CLK / currently_not_used

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Functional Description

JTAG

JTAG signals routed directly through the CPLD to 12 pin pinheader. Access between CPLD and pinheader can be multiplexed via JTAGEN (logical one for CPLD, logical zero for pinheader).

UART

UART is routed through the CPLD.

LED

ULED D4 (RED) is E xor not G

Appx. A: Change History and Legal Notices

Revision Changes

• REV01 to older REV01
  • set LED to not G only (removed E connection)
  • removed unused port H
  • no logical changes

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

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Legal Notices