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Connector JB1 (2 x 6 pin header) is compatible with XMOD-JTAG adapter TE0790. This adapter can be inserted from top onto the TE0725LP, if JB1 is fitted with male pin header. Optionally JB1 can be fitted with pin header from bottom, in that case the JTAG cable connector must be on the base board.
When using XMOD-JTAG in is connected to the JB1, then additionally USB UART is usableavailable, and the push-button on the XMOD works as configuration reset.
When using XMOD-JTAG please check the its DIP-switch S2 settings on XMOD to be sure the that correct power and I/O reference are supplied correctlyvoltages ares set. TE0790 can be in some cases used to power up TE0725LP, however this is not recommended. TE0790-01 can not supply enough power for TE0725LP (LED may blink but the module is not operating properly, especially in case of larger and more sophisticated FPGA designs).
On-board
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LEDs
There is one red LED connected to the FPGA bank 14, pin M16.
| LED | Color | FPGA | Notes |
|---|---|---|---|
| D2 | GreenRed | M16 | |
| D3 | Red | DONE | Active low |
| SYSLED |
Connectors
All connectors are are for 100mil headers, all connector locations are in 100 mil grid.
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Power and Power-On Sequence
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TE0725LP needs one single power supply with nominal of 3.3V.
Power Consumption
| FPGA | Design | Typical Power, 25C ambient |
|---|---|---|
| A100T | Not configured | TBD* |
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Variants Currently In Production
| Module Variant | FPGA Chip Model | PL Clock | VIN Supply Voltage |
|---|---|---|---|
| TE0725LP-01-100-2C | XC7A100T-2CSG324C | 25 MHz | 3.3 V |
| TE0725LP-01-100-2D | XC7A100T-2CSG324C | 25 MHz | 1.8 V |
| TE0725LP-01-100-2L | XC7A100T-2CSG324C | 25 MHz | 1.8 V |
Technical Specifications
Absolute Maximum Ratings
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| Date | Revision | Contributors | Description | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Jan Kumann | Initial version. |
Change History
Disclaimer
| Include Page | ||||
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Overview
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